URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [branch_qmem/] [or1200/] [rtl/] [verilog/] - Rev 610

Rev 610, 2002-01-23 07:52:36 GMT
Author: lampret
Log message:
Changed default reset values for SR and ESR to match or1ksim's. Fixed flop model in or1200_dpram_32x32 when OR1200_XILINX_RAM32X1D is defined.

Path
/trunk/or1200/rtl/verilog/or1200_dpram_32x32.v
/trunk/or1200/rtl/verilog/or1200_except.v
/trunk/or1200/rtl/verilog/or1200_sprs.v