OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [branch_qmem/] [or1200/] [rtl/] [verilog/] - Rev 778

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 778, 2002-03-28 19:25:42 GMT
  • Author: lampret
  • Log message:
    Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.