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[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [simple_plugin/] - Rev 5

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  • Rev 4, 2018-11-17 09:36:53 GMT
  • Author: sergeykhbr
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Path
/riscv_vhdl/trunk/debugger/.gitignore
/riscv_vhdl/trunk/debugger/makefiles/makefile
/riscv_vhdl/trunk/debugger/makefiles/make_appdbg64g
/riscv_vhdl/trunk/debugger/makefiles/make_cpu_fnc_plugin
/riscv_vhdl/trunk/debugger/makefiles/make_cpu_sysc_plugin
/riscv_vhdl/trunk/debugger/makefiles/make_gui_plugin
/riscv_vhdl/trunk/debugger/makefiles/make_libdbg64g
/riscv_vhdl/trunk/debugger/makefiles/make_simple_plugin
/riscv_vhdl/trunk/debugger/makefiles/make_socsim_plugin
/riscv_vhdl/trunk/debugger/makefiles/util.mak
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/riscv_vhdl/trunk/debugger/src/cpu_fnc_plugin/plugin_init.cpp
/riscv_vhdl/trunk/debugger/src/cpu_fnc_plugin/riscv-ext-a.cpp
/riscv_vhdl/trunk/debugger/src/cpu_fnc_plugin/riscv-ext-f.cpp
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/riscv_vhdl/trunk/debugger/src/cpu_sysc_plugin/plugin_init.cpp
/riscv_vhdl/trunk/debugger/src/cpu_sysc_plugin/riverlib/cache/cache_top.cpp
/riscv_vhdl/trunk/debugger/src/cpu_sysc_plugin/riverlib/cache/dcache.cpp
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/riscv_vhdl/trunk/debugger/src/cpu_sysc_plugin/riverlib/core/csr.cpp
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/riscv_vhdl/trunk/debugger/src/gui_plugin/ControlWidget/ConsoleWidget.cpp
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/riscv_vhdl/trunk/debugger/src/socsim_plugin/boardsim.cpp
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/riscv_vhdl/trunk/debugger/src/socsim_plugin/iboardsim.h
/riscv_vhdl/trunk/debugger/src/socsim_plugin/irqctrl.cpp
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/riscv_vhdl/trunk/debugger/src/socsim_plugin/plugin_init.cpp
/riscv_vhdl/trunk/debugger/src/socsim_plugin/pnp.cpp
/riscv_vhdl/trunk/debugger/src/socsim_plugin/pnp.h
/riscv_vhdl/trunk/debugger/src/socsim_plugin/rfctrl.cpp
/riscv_vhdl/trunk/debugger/src/socsim_plugin/rfctrl.h
/riscv_vhdl/trunk/debugger/src/socsim_plugin/ringbuf.h
/riscv_vhdl/trunk/debugger/src/socsim_plugin/types_amba.h
/riscv_vhdl/trunk/debugger/src/socsim_plugin/uart.cpp
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/riscv_vhdl/trunk/debugger/targets/default.h.json
/riscv_vhdl/trunk/debugger/targets/fpga_gui.json
/riscv_vhdl/trunk/debugger/targets/functional_sim_gui.json
/riscv_vhdl/trunk/debugger/targets/sysc_river_gui.json
/riscv_vhdl/trunk/LICENSE
/riscv_vhdl/trunk/README.md
/riscv_vhdl/trunk/rocket_soc
/riscv_vhdl/trunk/zephyr

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