URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [unitSdData/] - Rev 126

Rev 126, 2011-01-04 22:39:03 GMT
Author: rkastl
Log message:
Read and Write works in simulation, needs verification.
Synthesis works the same like before.

Path
/sdhc-sc-core/trunk/src/grpSd/pkgSd/src/Sd-p.vhdl
/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/SdWb-p.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdCardModel/src/SdCardModel.sv
/sdhc-sc-core/trunk/src/grpSd/unitSdCardModel/src/SdData.sv
/sdhc-sc-core/trunk/src/grpSd/unitSdClockMaster/src/SdClockMaster-Rtl-a.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdController/src/SdController-e.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdController/src/SdController-Rtl-a.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdData/src/SdData-e.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdData/src/SdData-Rtl-a.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdTop/src/SdTop-Rtl-ea.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdTop/syn/SdTopsyn.tcl
/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/sim/wave.do
/sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/src/SdVerificationTestbench.sv
/sdhc-sc-core/trunk/src/grpSd/unitSdWbSlave/src/SdWbSlave-e.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitSdWbSlave/src/SdWbSlave-Rtl-a.vhdl
/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/Files.tcl
/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/syn/TbdSdsyn.tcl
/sdhc-sc-core/trunk/src/grpSynchronization/unitSynchronizer/src/Synchronizer-Rtl-ea.vhdl