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[/] [socgen/] [trunk/] - Rev 16

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Last modification

  • Rev 16, 2010-04-20 23:07:09 GMT
  • Author: jt_eaton
  • Log message:
    added geda scripts and symbols/sch
Path
/socgen/trunk/bench/verilog/TestBench
/socgen/trunk/bin/Makefile.root
/socgen/trunk/bin/Makefile.root.x10
/socgen/trunk/bin/Makefile.root.x11
/socgen/trunk/bin/ver2gedasch
/socgen/trunk/bin/ver2gedasym
/socgen/trunk/Makefile
/socgen/trunk/projects/logic/ip/disp_io/doc/geda
/socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing
/socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing/filelist
/socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing/sch
/socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing/sym
/socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing/sym/disp_io.sym
/socgen/trunk/projects/logic/ip/disp_io/doc/html
/socgen/trunk/projects/logic/ip/disp_io/doc/png
/socgen/trunk/projects/logic/ip/disp_io/doc/timing
/socgen/trunk/projects/logic/ip/disp_io/rtl/variants/disp_io/disp_io_defines.v
/socgen/trunk/projects/logic/ip/disp_io/rtl/verilog/disp_io.v
/socgen/trunk/projects/logic/ip/disp_io/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/disp_io/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/io_module/doc/copyright.v
/socgen/trunk/projects/logic/ip/io_module/doc/geda
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/filelist
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/cde_sync_with_hysteresis.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/io_module.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/io_module_gpio.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/io_module_pic.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/io_module_ps2.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/io_module_timer.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/io_module_uart.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/io_module_utimer.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/ps2_interface.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/ps2_interface_fsm.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/uart.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/uart_baudgen.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/uart_rcvr.sym
/socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sym/uart_xmit.sym
/socgen/trunk/projects/logic/ip/io_module/doc/html
/socgen/trunk/projects/logic/ip/io_module/doc/png
/socgen/trunk/projects/logic/ip/io_module/doc/timing
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module/io_module_defines.v
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module_mouse/io_module_defines.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_gpio.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_pic.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_ps2.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_timer.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_uart.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_utimer.v
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/ps2_interface/doc/copyright.v
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/graphic
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sch
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sch/cde_sync_with_hysteresis.sch
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sch/ps2_interface.sch
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sch/ps2_interface_fsm.sch
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sym/cde_sync_with_hysteresis.sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sym/ps2_interface.sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/sym/ps2_interface_fsm.sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/drawing/timing
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/filelist
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sym/cde_sync_with_hysteresis.sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sym/ps2_interface.sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sym/ps2_interface_fsm.sym
/socgen/trunk/projects/logic/ip/ps2_interface/doc/html
/socgen/trunk/projects/logic/ip/ps2_interface/doc/png
/socgen/trunk/projects/logic/ip/ps2_interface/doc/timing
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/variants/ps2_interface/ps2_interface_defines.v
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface.v
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface_fsm.v
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/uart/doc/copyright.v
/socgen/trunk/projects/logic/ip/uart/doc/geda
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/filelist
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart.sch
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_baudgen.sch
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_rcvr.sch
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_xmit.sch
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sym
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sym/uart.sym
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sym/uart_baudgen.sym
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sym/uart_rcvr.sym
/socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sym/uart_xmit.sym
/socgen/trunk/projects/logic/ip/uart/doc/html
/socgen/trunk/projects/logic/ip/uart/doc/png
/socgen/trunk/projects/logic/ip/uart/doc/timing
/socgen/trunk/projects/logic/ip/uart/rtl/variants/uart/uart_defines.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart_baudgen.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart_rcvr.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart_xmit.v
/socgen/trunk/projects/logic/ip/uart/sim/run/default/dut
/socgen/trunk/projects/logic/ip/uart/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/uart/sim/run/default/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/filelist
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/cde_sram.sch
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc.sch
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_alu.sch
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_fifo4.sch
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_presclr_wdt.sch
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_register_file.sch
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sym
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sym/cde_sram.sym
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sym/mrisc.sym
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sym/mrisc_alu.sym
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sym/mrisc_fifo4.sym
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sym/mrisc_presclr_wdt.sym
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sym/mrisc_register_file.sym
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/html
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/png
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/timing
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/variants/mrisc/mrisc_defines.v
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/verilog/mrisc.v
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/verilog/mrisc_alu.v
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/verilog/mrisc_fifo.v
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/verilog/mrisc_presclr_wdt.v
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/verilog/mrisc_register_file.v
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/test_define
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/html
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/png
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/README.txt
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/timing
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/variants/soc_mouse_mrisc/soc_mouse_defines.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/verilog/soc_mouse.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/TB.defs
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/test_define
/socgen/trunk/targets/Basys/Pad_Ring.v

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