OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] - Rev 20

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 20, 2010-05-05 05:16:30 GMT
  • Author: jt_eaton
  • Log message:
    added Nexys2 support
    expanded docs
    created tools directory
Path
/socgen/trunk/bench/verilog/TestBench
/socgen/trunk/bin
/socgen/trunk/doc/src/drawing/sch/data_fig1.sch
/socgen/trunk/doc/src/drawing/sch/doc_fig1.sch
/socgen/trunk/doc/src/guides/guide_database.html
/socgen/trunk/doc/src/guides/guide_documentation.html
/socgen/trunk/doc/src/guides/guide_names.html
/socgen/trunk/doc/src/png
/socgen/trunk/doc/src/png/data_fig1.png
/socgen/trunk/doc/src/png/doc_fig1.png
/socgen/trunk/doc/src/png/naming_guide_1.png
/socgen/trunk/doc/src/prj_description.html
/socgen/trunk/doc/template/template.html
/socgen/trunk/geda
/socgen/trunk/lib/cde_dft
/socgen/trunk/lib/cde_dft/cde_asyncdisable.v
/socgen/trunk/lib/cde_dft/cde_clk_diff_testmux.v
/socgen/trunk/lib/cde_dft/cde_clk_gater.v
/socgen/trunk/lib/cde_dft/cde_clk_testmux.v
/socgen/trunk/lib/cde_dft/cde_reset.v
/socgen/trunk/lib/cde_divider/cde_divider.v
/socgen/trunk/lib/cde_prescale/cde_prescale.v
/socgen/trunk/lib/cde_serial_rcvr/cde_serial_rcvr.v
/socgen/trunk/lib/doc/drawing/cde_asyncdisable.png
/socgen/trunk/lib/doc/drawing/sch/cde_asyncdisable.sch
/socgen/trunk/lib/doc/drawing/sym/cde_asyncdisable.sym
/socgen/trunk/lib/doc/drawing/sym/cde_serial_rcvr.sym
/socgen/trunk/lib/doc/html/blocks.html
/socgen/trunk/lib/doc/html/cde_asyncdisable.html
/socgen/trunk/lib/doc/html/cde_clk_diff_testmux.html
/socgen/trunk/lib/doc/html/cde_clk_gater.html
/socgen/trunk/lib/doc/html/cde_clk_testmux.html
/socgen/trunk/lib/doc/html/cde_dft.html
/socgen/trunk/lib/doc/html/cde_divider.html
/socgen/trunk/lib/doc/html/cde_pad_se_dig.html
/socgen/trunk/lib/doc/html/cde_reset.html
/socgen/trunk/lib/doc/html/cde_serial_rcvr.html
/socgen/trunk/lib/doc/html/cde_serial_xmit.html
/socgen/trunk/lib/doc/html/cde_sram.html
/socgen/trunk/lib/doc/html/cde_sync.html
/socgen/trunk/lib/doc/html/cde_synchronizers.html
/socgen/trunk/lib/doc/html/cde_sync_with_hysteresis.html
/socgen/trunk/lib/doc/html/cde_sync_with_reset.html
/socgen/trunk/lib/doc/html/pads.html
/socgen/trunk/lib/doc/html/srams.html
/socgen/trunk/lib/doc/index.html
/socgen/trunk/lib/doc/png/cde_asyncdisable.png
/socgen/trunk/lib/doc/png/cde_serial_rcvr.png
/socgen/trunk/Makefile
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_ps2.v
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/dut
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface.v
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface_fsm.v
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/dut
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/ps2_interface/sim/run/default/sav.sav
/socgen/trunk/projects/logic/ip/serial_rcvr
/socgen/trunk/projects/logic/ip/serial_rcvr/bin
/socgen/trunk/projects/logic/ip/serial_rcvr/bin/Makefile
/socgen/trunk/projects/logic/ip/serial_rcvr/doc
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/copyright.v
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/geda
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/geda/drawing
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/geda/drawing/filelist
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/geda/drawing/sch
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/geda/drawing/sch/serial_xmit.sch
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/geda/drawing/sym
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/geda/drawing/sym/serial_xmit.sym
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/html
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/html/serial_xmit.html
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/index.html
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/png
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/png/serial_xmit.png
/socgen/trunk/projects/logic/ip/serial_rcvr/doc/timing
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl/variants
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl/variants/serial_rcvr
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl/variants/serial_rcvr/serial_rcvr_defines.v
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl/verilog
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl/verilog/serial_rcvr.v
/socgen/trunk/projects/logic/ip/serial_rcvr/sim
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/bin
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/bin/Makefile
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/log
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/out
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/dmp_define
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/dut
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/modellist
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/serial_rcvr/syn
/socgen/trunk/projects/logic/ip/uart/rtl/variants/uart/uart_defines.v
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart.v
/socgen/trunk/projects/logic/ip/uart/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/uart/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/uart/sim/run/default/test_define
/socgen/trunk/projects/pic_micro/children/logic/ip/serial_rcvr
/socgen/trunk/projects/pic_micro/ip/mrisc/syn/Basys_loop/gate_sims
/socgen/trunk/projects/pic_micro/ip/mrisc/syn/Basys_loop/gate_sims/par
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/liblist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/gate_sims
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/gate_sims/par
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/bsdl
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/core.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/debug
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/debug/fpga_load
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/debug/impact_bat
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/def_file
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/gate_sims
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/gate_sims/par
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/Makefile
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/sim
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/sim/bin
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/sim/log
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/sim/out
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/sim/run
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/target
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/target/Nexys2
/socgen/trunk/targets/Nexys2
/socgen/trunk/targets/Nexys2/bsdl
/socgen/trunk/targets/Nexys2/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/targets/Nexys2/bsdl/xcf04s_vo20.bsd
/socgen/trunk/targets/Nexys2/cclk.ut
/socgen/trunk/targets/Nexys2/jtag.ut
/socgen/trunk/targets/Nexys2/lib
/socgen/trunk/targets/Nexys2/lib/syn
/socgen/trunk/targets/Nexys2/lib/syn/cde_clock_sys
/socgen/trunk/targets/Nexys2/lib/syn/cde_clock_sys/cde_clock_sys.v
/socgen/trunk/targets/Nexys2/lib/syn/cde_jtag
/socgen/trunk/targets/Nexys2/lib/syn/cde_jtag/cde_jtag.v
/socgen/trunk/targets/Nexys2/lib/syn/cde_jtag/cde_jtag_rpc_reg.v
/socgen/trunk/targets/Nexys2/Makefile.brd
/socgen/trunk/targets/Nexys2/Nexys2_1200General.ucf
/socgen/trunk/targets/Nexys2/Pad_Ring.ucf
/socgen/trunk/targets/Nexys2/Pad_Ring.v
/socgen/trunk/tools
/socgen/trunk/tools/bin
/socgen/trunk/tools/bin/build_cmp
/socgen/trunk/tools/bin/hex2abs
/socgen/trunk/tools/bin/hex2abs12
/socgen/trunk/tools/bin/hex2abs16
/socgen/trunk/tools/bin/hex2abs_split
/socgen/trunk/tools/bin/Makefile
/socgen/trunk/tools/bin/Makefile.root
/socgen/trunk/tools/bin/Makefile.root.x10
/socgen/trunk/tools/bin/Makefile.root.x11
/socgen/trunk/tools/bin/ver2gedasch
/socgen/trunk/tools/bin/ver2gedasym
/socgen/trunk/tools/geda
/socgen/trunk/tools/geda/dot_gEDA
/socgen/trunk/tools/geda/dot_gEDA/gafrc
/socgen/trunk/tools/geda/dot_gEDA/gschemrc
/socgen/trunk/tools/geda/dot_gEDA/sym
/socgen/trunk/tools/geda/dot_gEDA/sym/frames
/socgen/trunk/tools/geda/dot_gEDA/sym/frames/frame_320x240.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/frames/frame_640x480.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/frames/frame_800x600.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/frames/frame_1200x768.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/frames/frame_1280x960.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/frames/frame_1600x1200.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/frames/frame_3200x2400.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/pads
/socgen/trunk/tools/geda/dot_gEDA/sym/pads/in_pad.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/pads/io_pad.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/pads/out_pad.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/pads/tri_pad.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/ports
/socgen/trunk/tools/geda/dot_gEDA/sym/ports/in_port.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/ports/in_port_v.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/ports/io_port.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/ports/io_port_v.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/ports/out_port.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/ports/out_port_v.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/regs
/socgen/trunk/tools/geda/dot_gEDA/sym/regs/reg.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/regs/reg_rst.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/regs/veg.sym
/socgen/trunk/tools/geda/dot_gEDA/sym/regs/veg_rst.sym
/socgen/trunk/tools/geda/Makefile
/socgen/trunk/tools/geda/README.txt

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.