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[/] [socgen/] [trunk/] - Rev 74

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Last modification

  • Rev 74, 2010-10-30 20:54:08 GMT
  • Author: jt_eaton
  • Log message:
    split out sw Makefile into projects /bin
    split out _cpu into seperate component
Path
/socgen/trunk/Makefile
/socgen/trunk/projects/logic/bin/Makefile.6502
/socgen/trunk/projects/logic/sw/font/Makefile
/socgen/trunk/projects/logic/sw/startup/Makefile
/socgen/trunk/projects/logic/sw/vga_font/Makefile
/socgen/trunk/projects/logic/sw/vga_startup_screen/Makefile
/socgen/trunk/projects/Mos6502/bin/Makefile.6502
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_irq_2/core.v
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll_2/core.v
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_irq_2_test/core.v
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_kim_2/core.v
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_tim_2/core.v
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/rtl/xml/T6502_cpu.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test/dut
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test/modellist
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test/params.sim
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/sim/run/inst_2_test/test_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/rtl/verilog/top.v
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/rtl/xml/T6502_cpu_alu.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default/dut
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default/modellist
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default/params.sim
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu/sim/run/default/test_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu_logic/sim/run/alu_logic_test/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/rtl/xml/T6502_cpu_control.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default/dut
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default/modellist
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default/params.sim
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_control/sim/run/default/test_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/rtl/xml/T6502_cpu_inst_decode.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default/dut
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default/modellist
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default/params.sim
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_inst_decode/sim/run/default/test_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/rtl/xml/T6502_cpu_sequencer.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default/dut
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default/modellist
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default/params.sim
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_sequencer/sim/run/default/test_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/rtl/xml/T6502_cpu_state_fsm.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default/dut
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default/modellist
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default/params.sim
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_state_fsm/sim/run/default/test_define
/socgen/trunk/projects/Mos6502/sw/boot/Makefile
/socgen/trunk/projects/Mos6502/sw/boot_tim1/Makefile
/socgen/trunk/projects/Mos6502/sw/inst_2_test/Makefile
/socgen/trunk/projects/Mos6502/sw/inst_test/Makefile
/socgen/trunk/projects/Mos6502/sw/io_irq/Makefile
/socgen/trunk/projects/Mos6502/sw/io_irq_2/Makefile
/socgen/trunk/projects/Mos6502/sw/io_module/Makefile
/socgen/trunk/projects/Mos6502/sw/io_poll/Makefile
/socgen/trunk/projects/Mos6502/sw/io_poll_2/Makefile
/socgen/trunk/projects/Mos6502/sw/irq_2_test/Makefile
/socgen/trunk/projects/Mos6502/sw/irq_test/Makefile
/socgen/trunk/projects/Mos6502/sw/kim_1/Makefile
/socgen/trunk/projects/Mos6502/sw/kim_2/Makefile
/socgen/trunk/projects/Mos6502/sw/Prog/Makefile
/socgen/trunk/projects/Mos6502/sw/prog_1_test/Makefile
/socgen/trunk/projects/Mos6502/sw/prog_test/Makefile
/socgen/trunk/projects/Mos6502/sw/table/Makefile
/socgen/trunk/projects/Mos6502/sw/table_tim1/Makefile
/socgen/trunk/projects/Mos6502/sw/tim_1/Makefile
/socgen/trunk/projects/Mos6502/sw/tim_2/Makefile
/socgen/trunk/projects/Mos6502/sw/vga_font/Makefile
/socgen/trunk/projects/Mos6502/sw/vga_startup_screen/Makefile
/socgen/trunk/projects/pic_micro/bin/Makefile.6502
/socgen/trunk/projects/pic_micro/bin/Makefile.pic
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/variants
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/verilog
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/xml/mrisc.xml
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/dut
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/loop/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/dut
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf1/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/dut
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf2/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/dut
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/rf3/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/dut
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity1/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/dut
/socgen/trunk/projects/pic_micro/ip/mrisc/sim/run/sanity2/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc/syn/Basys_loop/core.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/bin
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/bin/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/copyright.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/filelist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sch
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sch/cde_sram.sch
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sch/mrisc.sch
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sch/mrisc_alu.sch
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sch/mrisc_fifo4.sch
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sch/mrisc_presclr_wdt.sch
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sch/mrisc_register_file.sch
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sym
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sym/cde_sram.sym
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sym/mrisc.sym
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sym/mrisc_alu.sym
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sym/mrisc_fifo4.sym
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sym/mrisc_presclr_wdt.sym
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/geda/drawing/sym/mrisc_register_file.sym
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/html
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/index.html
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/png
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/png/mrisc.png
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/README.txt
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/doc/timing
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/variants
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/variants/mrisc_cpu
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/variants/mrisc_cpu/defines.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/verilog
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/verilog/alu.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/verilog/fifo.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/verilog/presclr_wdt.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/verilog/register_file.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/verilog/top.v
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/xml
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/xml/mrisc_cpu.xml
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/bin
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/bin/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/cov
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/cov/mrisc_cpu
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/cov/mrisc_cpu/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/cov/mrisc_cpu/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/log
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/out
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/dmp_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/dut
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/modellist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/ind_mem/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/dmp_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/dut
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/modellist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/loop/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/dmp_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/dut
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/modellist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf1/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/dmp_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/dut
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/modellist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf2/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/dmp_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/dut
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/modellist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/rf3/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/dmp_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/dut
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/modellist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity1/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/copyright
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/dmp_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/dut
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/Makefile
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/modellist
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/params.sim
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/TB.defs
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/sim/run/sanity2/test_define
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/syn
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/verilog/top.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/xml/soc_mouse_mrisc.xml
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/params.sim
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/core.v
/socgen/trunk/projects/pic_micro/sw/ind_mem
/socgen/trunk/projects/pic_micro/sw/ind_mem/ind_mem.asm
/socgen/trunk/projects/pic_micro/sw/ind_mem/Makefile
/socgen/trunk/projects/pic_micro/sw/loop/Makefile
/socgen/trunk/projects/pic_micro/sw/mouse/Makefile
/socgen/trunk/projects/pic_micro/sw/rf1/Makefile
/socgen/trunk/projects/pic_micro/sw/rf2/Makefile
/socgen/trunk/projects/pic_micro/sw/rf3/Makefile
/socgen/trunk/projects/pic_micro/sw/sanity1/Makefile
/socgen/trunk/projects/pic_micro/sw/sanity2/Makefile
/socgen/trunk/projects/pic_micro/sw/vga_font/Makefile
/socgen/trunk/projects/pic_micro/sw/vga_startup_screen/Makefile
/socgen/trunk/targets/Nexys2/Pad_Ring.v
/socgen/trunk/tools/bin/Makefile.root
/socgen/trunk/tools/bin/soc_builder
/socgen/trunk/tools/bin/soc_link

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