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[/] [socgen/] [trunk/] [tools/] [bin/] - Rev 86

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Last modification

Rev 86, 2011-03-20 04:38:22 GMT
Author: jt_eaton
Log message:
split out all fpgas into families
added fpga pad_ring level

Path
/socgen/trunk/projects/fpgas/ip/Basys
/socgen/trunk/projects/fpgas/ip/Basys_mrisc
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/bin
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/bin/Makefile
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/copyright.v
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/filelist
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/mouse_ctrl.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/mouse_ctrl_fsm.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/mouse_ctrl_poll.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/ps2_interface.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/ps2_interface_fsm.sch
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/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/uart.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/uart_baudgen.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/uart_rcvr.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/uart_xmit.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/vga_interface.sch
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/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sch/vga_interface_syncgen.sch
/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sym
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/socgen/trunk/projects/fpgas/ip/Basys_mrisc/doc/geda/drawing/sym/mouse_ctrl.sym
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/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_irq_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_irq_2/dmp_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_irq_2/dut
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_irq_2/test_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_irq_2/wave.sav
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_poll_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_poll_2/dmp_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_poll_2/dut
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_poll_2/test_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_io_poll_2/wave.sav
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_irq_2_test
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_irq_2_test/dmp_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_irq_2_test/dut
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_irq_2_test/test_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_irq_2_test/wav.sav
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_irq_2_test/wave.sav
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_kim_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_kim_2/dmp_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_kim_2/dut
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_kim_2/test_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_kim_2/wave.sav
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_tim_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_tim_2/dmp_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_tim_2/dut
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_tim_2/test_define
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/sim/run/T6502_tim_2/wave.sav
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/soc
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/soc/design.soc
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_irq_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_irq_2/bsdl
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_irq_2/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_irq_2/debug
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_irq_2/debug/fpga_load
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_irq_2/debug/impact_bat
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_poll_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_poll_2/bsdl
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_poll_2/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_poll_2/debug
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_poll_2/debug/fpga_load
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_io_poll_2/debug/impact_bat
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_irq_2_test
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_irq_2_test/bsdl
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_irq_2_test/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_irq_2_test/debug
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_irq_2_test/debug/fpga_load
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_irq_2_test/debug/impact_bat
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_kim_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_kim_2/bsdl
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_kim_2/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_kim_2/debug
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_kim_2/debug/fpga_load
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_kim_2/debug/impact_bat
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_tim_2
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_tim_2/bsdl
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_tim_2/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_tim_2/debug
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_tim_2/debug/fpga_load
/socgen/trunk/projects/fpgas/ip/Nexys2_T6502/syn/Nexys2_T6502_tim_2/debug/impact_bat
/socgen/trunk/projects/io/ip/io_ext_mem_interface/rtl/xml/io_ext_mem_interface.xml
/socgen/trunk/projects/io/ip/io_gpio/rtl/xml/io_gpio.xml
/socgen/trunk/projects/io/ip/io_module/rtl/xml/io_module.xml
/socgen/trunk/projects/io/ip/io_module/rtl/xml/io_module_gpio.xml
/socgen/trunk/projects/io/ip/io_module/rtl/xml/io_module_mouse.xml
/socgen/trunk/projects/io/ip/io_pic/rtl/xml/io_pic.xml
/socgen/trunk/projects/io/ip/io_ps2/rtl/xml/io_ps2.xml
/socgen/trunk/projects/io/ip/io_timer/rtl/xml/io_timer.xml
/socgen/trunk/projects/io/ip/io_uart/rtl/xml/io_uart.xml
/socgen/trunk/projects/io/ip/io_utimer/rtl/xml/io_utimer.xml
/socgen/trunk/projects/io/ip/io_vga/rtl/xml/io_vga.xml
/socgen/trunk/projects/io/ip/io_vic/rtl/xml/io_vic.xml
/socgen/trunk/projects/logic/ip/disp_io/rtl/xml/disp_io.xml
/socgen/trunk/projects/logic/ip/flash_memcontrl/rtl/xml/flash_memcontrl.xml
/socgen/trunk/projects/logic/ip/micro_bus/rtl/xml/micro_bus.xml
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/xml/ps2_interface.xml
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl/xml/serial_rcvr.xml
/socgen/trunk/projects/logic/ip/uart/rtl/xml/uart.xml
/socgen/trunk/projects/logic/ip/usb_epp/rtl/xml/usb_epp.xml
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xml/vga_char_ctrl.xml
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xml/vga_char_ctrl_600x432.xml
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/xml/T6502.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu/rtl/xml/T6502_cpu.xml
/socgen/trunk/projects/Mos6502/ip/T6502_cpu_alu_logic/rtl/xml/T6502_cpu_alu_logic.xml
/socgen/trunk/projects/pic_micro/ip/mrisc/rtl/xml/mrisc.xml
/socgen/trunk/projects/pic_micro/ip/mrisc_cpu/rtl/xml/mrisc_cpu.xml
/socgen/trunk/projects/pic_micro/ip/soc/rtl/xml/soc_mrisc_io.xml
/socgen/trunk/tools/bin/build_verilog
/socgen/trunk/tools/bin/Makefile.root

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