URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [bench/] [verilog/] - Rev 46

Rev 46, 2009-05-14 11:37:35 GMT
Author: julius
Log message:
Flash memory now also disabled when SDRAM disabled, which is by default. Ethernet now enabled by defining USE_ETHERNET, otherwise it is disabled by default. Default icarus tests now very fast due to this

Path
/test_project/trunk/bench/verilog/orpsoc_testbench.v
/test_project/trunk/rtl/verilog/orpsoc_top.v