URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [rtl/] - Rev 54

Rev 54, 2009-05-20 13:38:53 GMT
Author: julius
Log message:
Added verilog UART decoder for event-driven sim tests (icarus, nc) - removed MAC tests from multiplier tests - not returning right results for some reason - should be looked at

Path
/test_project/trunk/bench/verilog/orpsoc_testbench.v
/test_project/trunk/bench/verilog/orpsoc_testbench_defines.v
/test_project/trunk/bench/verilog/uart_decoder.v
/test_project/trunk/rtl/verilog/orpsoc_top.v
/test_project/trunk/sim/bin/Makefile
/test_project/trunk/sw/dhry/dhry.c
/test_project/trunk/sw/except/except_test.c
/test_project/trunk/sw/mul/mul-nocache-O2-soft.asm
/test_project/trunk/sw/mul/mul-O2-hard.asm
/test_project/trunk/sw/mul/mul-O2-soft.asm
/test_project/trunk/sw/mul/mul.c
/test_project/trunk/sw/support/Makefile.inc