URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] - Rev 58

Rev 58, 2010-03-31 08:31:51 GMT
Author: julius
Log message:
sdr_16 fixes for timing - extra egress register stage, appropriate changes in sdr_16 fsm

Path
/versatile_mem_ctrl/trunk/rtl/verilog/egress_fifo.v
/versatile_mem_ctrl/trunk/rtl/verilog/fsm_sdr_16.v
/versatile_mem_ctrl/trunk/rtl/verilog/sdr_16.v