URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] - Rev 76

Rev 76, 2010-04-16 15:12:35 GMT
Author: julius
Log message:
Changed SDR16 synthesis useioff location, fsm_wb acking logic, default SDR build is for 16m part now

Path
/versatile_mem_ctrl/trunk/rtl/verilog/fsm_wb.v
/versatile_mem_ctrl/trunk/rtl/verilog/sdr_16_defines.v
/versatile_mem_ctrl/trunk/rtl/verilog/versatile_mem_ctrl_top.v