URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] - Rev 31

Rev 31, 2010-03-13 15:11:43 GMT
Author: mikaeljf
Log message:
Added Xilinx primitive for dff_sr.v module, updated rtl-Makefile adn simulation scripts.

Path
/versatile_mem_ctrl/trunk/rtl/verilog/Makefile
/versatile_mem_ctrl/trunk/rtl/verilog/versatile_counter.xls
/versatile_mem_ctrl/trunk/sim/rtl_sim/bin/sim_altera.tcl
/versatile_mem_ctrl/trunk/sim/rtl_sim/bin/sim_xilinx.tcl