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[/] [zipcpu/] [trunk/] [rtl/] - Rev 65
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Last modification
- Rev 65, 2015-10-22 15:59:30 GMT
- Author: dgisselq
- Log message:
- Lots of logic simplifications to the core, in addition to better support for
illegal instruction detection and bus error detection. The biggest change
had to deal with pushing the debug write interface into the ALU write
processing path. This simplifies the logic of adjusting the PC and CC
registers primarily, but also any writes to other registers. It also delays
these register writes by a clock, but since the debug interface is already
ridiculously slow I doubt that matters any.