OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [rtl/] [aux/] - Rev 69

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 69, 2015-12-22 16:06:51 GMT
  • Author: dgisselq
  • Log message:
    This implements the "new Instruction Set" architecture for the Zip CPU. It's
    a massive change set, that touches just about everything but probably not
    enough of everything. Please see the spec.pdf for a description of this
    new architecture.
Path
/zipcpu/trunk/bench/asm/helloworld.S
/zipcpu/trunk/bench/asm/ivec.S
/zipcpu/trunk/bench/asm/lodsto.S
/zipcpu/trunk/bench/asm/Makefile
/zipcpu/trunk/bench/asm/pcpc.S
/zipcpu/trunk/bench/asm/testdiv.S
/zipcpu/trunk/bench/asm/wdt.S
/zipcpu/trunk/bench/asm/zipdhry.S
/zipcpu/trunk/bench/cpp/Makefile
/zipcpu/trunk/bench/cpp/memsim.cpp
/zipcpu/trunk/bench/cpp/memsim.h
/zipcpu/trunk/bench/cpp/pdump.cpp
/zipcpu/trunk/bench/cpp/testb.h
/zipcpu/trunk/bench/cpp/twoc.cpp
/zipcpu/trunk/bench/cpp/twoc.h
/zipcpu/trunk/bench/cpp/zippy_tb.cpp
/zipcpu/trunk/doc/gfx/bc.eps
/zipcpu/trunk/doc/gfx/bra.eps
/zipcpu/trunk/doc/gfx/cpu.dia
/zipcpu/trunk/doc/gfx/cpu.eps
/zipcpu/trunk/doc/gfx/cpu.png
/zipcpu/trunk/doc/gfx/memrd.eps
/zipcpu/trunk/doc/gfx/memwr.eps
/zipcpu/trunk/doc/gfx/regset.png
/zipcpu/trunk/doc/gfx/system.dia
/zipcpu/trunk/doc/gfx/system.eps
/zipcpu/trunk/doc/gfx/system.png
/zipcpu/trunk/doc/gfx/zipbones.dia
/zipcpu/trunk/doc/gfx/zipbones.png
/zipcpu/trunk/doc/iset.html
/zipcpu/trunk/doc/Makefile
/zipcpu/trunk/doc/spec.pdf
/zipcpu/trunk/doc/src/spec.tex
/zipcpu/trunk/Makefile
/zipcpu/trunk/rtl/aux/busdelay.v
/zipcpu/trunk/rtl/aux/wbarbiter.v
/zipcpu/trunk/rtl/aux/wbdblpriarb.v
/zipcpu/trunk/rtl/aux/wbpriarbiter.v
/zipcpu/trunk/rtl/core/cpuops.v
/zipcpu/trunk/rtl/core/cpuops_deprecated.v
/zipcpu/trunk/rtl/core/div.v
/zipcpu/trunk/rtl/core/idecode.v
/zipcpu/trunk/rtl/core/idecode_deprecated.v
/zipcpu/trunk/rtl/core/memops.v
/zipcpu/trunk/rtl/core/pfcache.v
/zipcpu/trunk/rtl/core/pipefetch.v
/zipcpu/trunk/rtl/core/pipemem.v
/zipcpu/trunk/rtl/core/prefetch.v
/zipcpu/trunk/rtl/core/zipcpu.v
/zipcpu/trunk/rtl/cpudefs.v
/zipcpu/trunk/rtl/Makefile
/zipcpu/trunk/rtl/peripherals/flashcache.v
/zipcpu/trunk/rtl/peripherals/icontrol.v
/zipcpu/trunk/rtl/peripherals/wbdmac.v
/zipcpu/trunk/rtl/peripherals/wbwatchdog.v
/zipcpu/trunk/rtl/peripherals/zipcounter.v
/zipcpu/trunk/rtl/peripherals/zipjiffies.v
/zipcpu/trunk/rtl/peripherals/ziptimer.v
/zipcpu/trunk/rtl/peripherals/ziptrap.v
/zipcpu/trunk/rtl/zipbones.v
/zipcpu/trunk/rtl/zipsystem.v
/zipcpu/trunk/sw/lib/divs.S
/zipcpu/trunk/sw/lib/divu.S
/zipcpu/trunk/sw/lib/mpy32s.S
/zipcpu/trunk/sw/lib/mpy32u.S
/zipcpu/trunk/sw/zasm/asmdata.cpp
/zipcpu/trunk/sw/zasm/asmdata.h
/zipcpu/trunk/sw/zasm/Makefile
/zipcpu/trunk/sw/zasm/optest.cpp
/zipcpu/trunk/sw/zasm/sys.i
/zipcpu/trunk/sw/zasm/test.S
/zipcpu/trunk/sw/zasm/twoc.cpp
/zipcpu/trunk/sw/zasm/twoc.h
/zipcpu/trunk/sw/zasm/zasm.l
/zipcpu/trunk/sw/zasm/zasm.y
/zipcpu/trunk/sw/zasm/zdump.cpp
/zipcpu/trunk/sw/zasm/zopcodes.cpp
/zipcpu/trunk/sw/zasm/zopcodes.h
/zipcpu/trunk/sw/zasm/zparser.cpp
/zipcpu/trunk/sw/zasm/zparser.h
/zipcpu/trunk/sw/zasm/zpp.l
/zipcpu/trunk/sw/zipdbg/devbus.h
/zipcpu/trunk/sw/zipdbg/regdefs.h
/zipcpu/trunk/sw/zipdbg/zipdbg.cpp
/zipcpu/trunk/zip.vim

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.