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https://opencores.org/ocsvn/amber/amber/trunk
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[/] [amber/] [trunk/] [hw/] [vlog/] [tb/] - Rev 35
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Last modification
- Rev 35, 2011-05-21 15:02:33 GMT
- Author: csantifort
- Log message:
- Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts
