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[/] - Rev 144

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Last modification

Rev 144, 2004-04-01 11:56:59 GMT
Author: igorm
Log message:
Port names and defines for the supported CPUs changed.

Path
/trunk/rtl/verilog/dbg_defines.v
/trunk/rtl/verilog/dbg_top.v
/trunk/rtl/verilog/dbg_wb.v

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