URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] - Rev 26

Rev 26, 2019-06-14 10:16:26 GMT
Author: robfinch
Log message:
- factor out sizes
- add leading bit for FMA normalization to normalizer

Path
/ft816float/trunk/rtl/verilog/DivGoldschmidt.v
/ft816float/trunk/rtl/verilog/f2i.v
/ft816float/trunk/rtl/verilog/F32ToF80.v
/ft816float/trunk/rtl/verilog/fpAddsub.v
/ft816float/trunk/rtl/verilog/fpAddsub_L10.v
/ft816float/trunk/rtl/verilog/fpDecompReg.v
/ft816float/trunk/rtl/verilog/fpDiv.v
/ft816float/trunk/rtl/verilog/fpdivr2.v
/ft816float/trunk/rtl/verilog/fpdivr8.v
/ft816float/trunk/rtl/verilog/fpFMA.v
/ft816float/trunk/rtl/verilog/fpLOOUnit.v
/ft816float/trunk/rtl/verilog/fpMul.v
/ft816float/trunk/rtl/verilog/fpNormalize.v
/ft816float/trunk/rtl/verilog/fpRes.sv
/ft816float/trunk/rtl/verilog/fpRound.v
/ft816float/trunk/rtl/verilog/fpRsqrte.sv
/ft816float/trunk/rtl/verilog/fpSigmoid.v
/ft816float/trunk/rtl/verilog/fpSize.sv
/ft816float/trunk/rtl/verilog/fpSqrt.v
/ft816float/trunk/rtl/verilog/fpTrunc.sv
/ft816float/trunk/rtl/verilog/fpUnit.v
/ft816float/trunk/rtl/verilog/fpZLUnit.v
/ft816float/trunk/rtl/verilog/fp_cmp_unit.v
/ft816float/trunk/rtl/verilog/fp_decomp.v
/ft816float/trunk/rtl/verilog/fp_defines.v
/ft816float/trunk/rtl/verilog/i2f.v
/ft816float/trunk/rtl/verilog/isqrt.v