URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] - Rev 66

Rev 66, 2012-03-03 17:58:06 GMT
Author: motilito
Log message:
Adding interrupt example code to the Verilog implementation. An interrupt controller was added to the sample SOC module and a sample code was added to the "hello.c" example code.

Path
/light8080/trunk/c/hello.asm
/light8080/trunk/c/hello.c
/light8080/trunk/c/HELLO.HEX
/light8080/trunk/c/HELLO.LST
/light8080/trunk/c/intr_vec.h
/light8080/trunk/c/ram_image.v
/light8080/trunk/tools/c80/c80.c
/light8080/trunk/tools/c80/c80.lib
/light8080/trunk/verilog/bench/tb_l80soc.v
/light8080/trunk/verilog/rtl/intr_ctrl.v
/light8080/trunk/verilog/rtl/l80soc.v
/light8080/trunk/verilog/rtl/ram_image.v
/light8080/trunk/verilog/sim/icarus/block.cfg
/light8080/trunk/verilog/syn/altera_c2/l80soc.fit.rpt
/light8080/trunk/verilog/syn/altera_c2/l80soc.qsf
/light8080/trunk/verilog/syn/xilinx_s3/l80soc_summary.html
/light8080/trunk/verilog/syn/xilinx_s3/xilinx_s3.xise