URL https://opencores.org/ocsvn/minimips_superscalar/minimips_superscalar/trunk

Last modification

• Rev 18, 2019-03-23 04:25:17 GMT
• Author: mcafruni

• Log message:

  clock_gate.vhd: removed.
  minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.

Path
/minimips_superscalar/tags/P0/bench/bench_minimips.vhd
/minimips_superscalar/tags/P0/sources/minimips.vhd
/minimips_superscalar/trunk/bench/bench_minimips.vhd
/minimips_superscalar/trunk/sources/minimips.vhd