Subversion Repositories minsoc

[/] [minsoc/] [branches/] [verilator/] [rtl/] [verilog/] - Rev 33


Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 33, 2010-10-07 13:19:10 GMT
  • Author: rfajardo
  • Log message:
    Start-up Starter, included in the MinSoC top file, has been updated to three-phase instruction output; instruction assertion, acknowledge assertion, and next instruction with acknowledge deassertion.

    Previously it was two-phase with next instruction, instruction assertion and acknowledge assertion together, and acknowledge deassertion.

    That is required by the new Wishbone master interface used by OpenRISC release 3.

powered by: WebSVN 2.1.0

© copyright 1999-2024, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.