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[/] [minsoc/] [trunk/] [rtl/] [verilog/] - Rev 60

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Last modification

  • Rev 60, 2011-04-28 22:44:09 GMT
  • Author: rfajardo
  • Log message:
    Selection of memory model or implementation memory is now made on minsoc_bench_defines.v. It is done by a definition instead of including different files for simulation.

    minsoc_bench_defines.v definition of reset level was not correct. It based the level decision on defineds POSITIVE_RESET or NEGATIVE_RESET, which couldn't be defined by then, since minsoc_defines.v is not included in minsoc_bench_defines.v. The decision has been moved to minsoc_bench.v and made a localparam instead of a definition.

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