OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] - Rev 9

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 9, 2012-10-23 13:41:23 GMT
  • Author: JonasDC
  • Log message:
    added descriptive comments, and renamed input mux_result from cell_1b_adder to b for a more generic multipurpose code
    also renamed output s from n_adder to r, to keep same signal names

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.