OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] - Rev 64

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 64, 2013-02-26 14:49:12 GMT
  • Author: JonasDC
  • Log message:
    added synthesis reports of xilinx and altera
Path
/mod_sim_exp/trunk/syn
/mod_sim_exp/trunk/syn/altera
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/1.htm
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/2.htm
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/css/base.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/css/jquery-ui.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/css/jquery.layout-latest.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/css/override.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/css/reset.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_bar_chart.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_closed_folder.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_generic_file.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_histogram.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_input_small.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_msg_critical_warning.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_msg_debug.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_msg_error.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_msg_extra_info.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_msg_info.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_msg_warning.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_opened_folder.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_question_mark.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_report_path.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_summary_table.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_table.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_timing_table.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/afcq_waveform.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_diagonals-thick_90_eeeeee_40x40.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_flat_15_cd0a0a_40x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_glass_50_3baae3_1x400.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_glass_80_d7ebf9_1x400.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_glass_100_e4f1fb_1x400.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_highlight-hard_70_000000_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_highlight-hard_100_f2f5f7_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_highlight-soft_25_ffef8f_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-bg_highlight-soft_100_deedf7_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-icons_2e83ff_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-icons_3d80b3_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-icons_72a7cf_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-icons_2694e8_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/img/ui-icons_ffffff_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/js
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/js/jquery-ui.min.js
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/js/jquery.layout-latest.js
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_res.htm_files/js/jquery.min.js
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/1.htm
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/2.htm
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/css/base.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/css/jquery-ui.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/css/jquery.layout-latest.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/css/override.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/css/reset.css
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_bar_chart.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_closed_folder.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_generic_file.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_histogram.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_input_small.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_msg_critical_warning.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_msg_debug.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_msg_error.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_msg_extra_info.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_msg_info.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_msg_warning.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_opened_folder.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_question_mark.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_report_path.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_summary_table.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_table.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_timing_table.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/afcq_waveform.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_diagonals-thick_90_eeeeee_40x40.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_flat_15_cd0a0a_40x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_glass_50_3baae3_1x400.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_glass_80_d7ebf9_1x400.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_glass_100_e4f1fb_1x400.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_highlight-hard_70_000000_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_highlight-hard_100_f2f5f7_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_highlight-soft_25_ffef8f_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-bg_highlight-soft_100_deedf7_1x100.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-icons_2e83ff_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-icons_3d80b3_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-icons_72a7cf_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-icons_2694e8_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/img/ui-icons_ffffff_256x240.png
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/js
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/js/jquery-ui.min.js
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/js/jquery.layout-latest.js
/mod_sim_exp/trunk/syn/altera/ver011_msec_genRAM_sum.htm_files/js/jquery.min.js
/mod_sim_exp/trunk/syn/xilinx
/mod_sim_exp/trunk/syn/xilinx/operands_sp.pdf
/mod_sim_exp/trunk/syn/xilinx/ver010_msec_sum.html
/mod_sim_exp/trunk/syn/xilinx/ver010_msec_syn.html
/mod_sim_exp/trunk/syn/xilinx/ver011_msec_genRAM_sum.html
/mod_sim_exp/trunk/syn/xilinx/ver011_msec_genRAM_syn.html

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.