OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] - Rev 190

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 190, 2020-03-19 21:21:41 GMT
  • Author: jshamlet
  • Log message:
    Fixed a bug in CPU where RTI/RTS wasn't idling the instruction cache, causing intermittent failures where RTI would execute as RTS, corrupting the stack;
    Fixed a bug in the real-time clock where the uSec tick generator would stop if the PIT timer value was left/set to 0x00.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.