URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src-c/] - Rev 76

Rev 76, 2010-11-18 21:01:37 GMT
Author: olivier.girard
Log message:
Add possibility to simulate C code within the "core" environment.

Path
/openmsp430/trunk/core/bench/verilog/registers.v
/openmsp430/trunk/core/sim/rtl_sim/bin/msp430sim_c
/openmsp430/trunk/core/sim/rtl_sim/run/run_c
/openmsp430/trunk/core/sim/rtl_sim/src-c
/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox
/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/main.c
/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/sandbox.v