URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] - Rev 499

Rev 499, 2011-03-09 22:18:11 GMT
Author: julius
Log message:
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup

Path
/openrisc/trunk/orpsocv2/boards/actel/ordb1a3pe1500/rtl/verilog/include/or1200_defines.v
/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/or1200_defines.v
/openrisc/trunk/orpsocv2/rtl/verilog/include/or1200_defines.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_alu.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_cpu.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_ctrl.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_freeze.v
/openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_mult_mac.v
/openrisc/trunk/orpsocv2/sim/bin/Makefile
/openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-ext.S
/openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-ffl1.S
/openrisc/trunk/orpsocv2/sw/tests/or1200/sim/or1200-mac.S