URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] - Rev 132

Rev 132, 2003-12-19 11:11:32 GMT
Author: mihad
Log message:
Compact PCI Hot Swap support added.
New testcases added.
Specification updated.
Test application changed to support WB B3 cycles.

Path
/trunk/apps/test/rtl/verilog/pci_bridge32.v
/trunk/apps/test/rtl/verilog/pci_test_top_2clks.v
/trunk/apps/test/rtl/verilog/pci_user_constants.v
/trunk/apps/test/rtl/verilog/test.v
/trunk/apps/test/syn/synplify/pci_test_top.prj
/trunk/apps/test/syn/synplify/pci_test_top.ucf
/trunk/apps/test/syn/synplify/pci_test_top_2clks.sdc
/trunk/bench/verilog/pci_behaviorial_master.v
/trunk/bench/verilog/pci_bench_common_tasks.v
/trunk/bench/verilog/pci_regression_constants.v
/trunk/bench/verilog/pci_testbench_defines.v
/trunk/bench/verilog/system.v
/trunk/doc/pci_specification.doc
/trunk/doc/pci_specification.pdf
/trunk/rtl/verilog/pci_bridge32.v
/trunk/rtl/verilog/pci_conf_space.v
/trunk/rtl/verilog/pci_constants.v
/trunk/rtl/verilog/pci_in_reg.v
/trunk/rtl/verilog/pci_io_mux.v
/trunk/rtl/verilog/pci_master32_sm_if.v
/trunk/rtl/verilog/pci_rst_int.v
/trunk/rtl/verilog/pci_target32_interface.v
/trunk/rtl/verilog/pci_target32_sm.v
/trunk/rtl/verilog/pci_target_unit.v
/trunk/rtl/verilog/pci_user_constants.v
/trunk/rtl/verilog/pci_wbs_wbb3_2_wbb2.v
/trunk/rtl/verilog/pci_wbw_wbr_fifos.v
/trunk/rtl/verilog/pci_wb_slave.v
/trunk/sim/rtl_sim/bin/hdl.var
/trunk/sim/rtl_sim/log/get_log_err_war
/trunk/sim/rtl_sim/run/ncelab.args
/trunk/sim/rtl_sim/run/run_pci_sim_regr.scr
/trunk/sim/rtl_sim/run/top_groups.do