URL https://opencores.org/ocsvn/pit/pit/trunk

Subversion Repositories pit

[/] - Rev 16

Rev 16, 2009-10-08 17:17:03 GMT
Author: rehayes
Log message:
Added master error counter variable, added simulation timout limit

Path
/pit/trunk/bench/verilog/tst_bench_top.v
/pit/trunk/bench/verilog/wb_master_model.v