URL https://opencores.org/ocsvn/pit/pit/trunk

Subversion Repositories pit

[/] - Rev 24

Rev 24, 2011-10-25 01:00:04 GMT
Author: rehayes
Log message:
Added System Verilog Wishbone interface to module and testbench.

Path
/pit/trunk/bench/sys_verilog/tst_bench_top.sv
/pit/trunk/bench/sys_verilog/wb_master_model.sv
/pit/trunk/README.rtf
/pit/trunk/rtl/sys_verilog/pit_regs.sv
/pit/trunk/rtl/sys_verilog/pit_top.sv
/pit/trunk/rtl/sys_verilog/pit_wb_bus.sv
/pit/trunk/rtl/sys_verilog/pit_wb_if.sv