URL https://opencores.org/ocsvn/socgen/socgen/trunk

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Last modification

Rev 28, 2010-06-06 17:18:33 GMT
Author: jt_eaton
Log message:
added T6502 processor
added vga_char_ctrl

Path
/socgen/trunk/bench/verilog/models/clock_gen.v
/socgen/trunk/bench/verilog/models/micro_bus_model.v
/socgen/trunk/bench/verilog/models/ps2_host.v
/socgen/trunk/bench/verilog/models/timed_driver.v
/socgen/trunk/bench/verilog/models/timed_tester.v
/socgen/trunk/bench/verilog/models/timing_gen.v
/socgen/trunk/bench/verilog/models/uart_host.v
/socgen/trunk/bench/verilog/models/uart_model.v
/socgen/trunk/doc/src/drawing/sch/ver_fig1.sch
/socgen/trunk/doc/src/drawing/sch/ver_fig4.sch
/socgen/trunk/doc/src/guides/guide_verification.html
/socgen/trunk/doc/src/guides/reset_sys_design.html
/socgen/trunk/doc/src/png/ver_fig1.png
/socgen/trunk/doc/src/png/ver_fig4.png
/socgen/trunk/lib/cde_fifo
/socgen/trunk/lib/cde_fifo/cde_fifo.v
/socgen/trunk/lib/cde_serial_rcvr/cde_serial_rcvr.v
/socgen/trunk/lib/cde_serial_xmit/cde_serial_xmit.v
/socgen/trunk/lib/cde_sram/cde_sram.v
/socgen/trunk/lib/doc/drawing/sch/cde_asyncdisable.sch
/socgen/trunk/lib/doc/png/cde_asyncdisable.png
/socgen/trunk/Makefile
/socgen/trunk/projects/logic/ip/disp_io/sim/run/default/dut
/socgen/trunk/projects/logic/ip/disp_io/sim/run/default/modellist
/socgen/trunk/projects/logic/ip/disp_io/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module/io_module_defines.v
/socgen/trunk/projects/logic/ip/io_module/rtl/variants/io_module_mouse/io_module_defines.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_gpio_micro_reg.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_pic.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_pic_micro_reg.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_ps2.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_ps2_micro_reg.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_timer.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_timer_micro_reg.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_uart.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_uart_micro_reg.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_utimer.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_utimer_micro_reg.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_vga.v
/socgen/trunk/projects/logic/ip/io_module/rtl/verilog/io_module_vga_micro_reg.v
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/io_module/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/io_module/sim/run/mouse/filelist
/socgen/trunk/projects/logic/ip/io_module/sim/run/mouse/liblist
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface.v
/socgen/trunk/projects/logic/ip/ps2_interface/rtl/verilog/ps2_interface_fsm.v
/socgen/trunk/projects/logic/ip/serial_rcvr/rtl/verilog/serial_rcvr.v
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/dut
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/serial_rcvr/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/serial_xmit
/socgen/trunk/projects/logic/ip/uart/rtl/verilog/uart.v
/socgen/trunk/projects/logic/ip/uart/sim/run/default/dut
/socgen/trunk/projects/logic/ip/uart/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/uart/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/uart/sim/run/divide/dut
/socgen/trunk/projects/logic/ip/uart/sim/run/divide/filelist
/socgen/trunk/projects/logic/ip/uart/sim/run/divide/liblist
/socgen/trunk/projects/logic/ip/vga_char_ctrl
/socgen/trunk/projects/logic/ip/vga_char_ctrl/bin
/socgen/trunk/projects/logic/ip/vga_char_ctrl/bin/Makefile
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/copyright.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/geda
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/geda/drawing
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/geda/drawing/sch
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/geda/drawing/sym
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/gpl.txt
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/html
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/png
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/Readme.txt
/socgen/trunk/projects/logic/ip/vga_char_ctrl/doc/timing
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/variants
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/variants/vga_char_ctrl
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/variants/vga_char_ctrl/vga_char_ctrl_defines.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/variants/vga_char_ctrl_600x432
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/variants/vga_char_ctrl_600x432/vga_char_ctrl_defines.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/verilog
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/verilog/vga_char_ctrl.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/verilog/vga_char_ctrl_char_display.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/verilog/vga_char_ctrl_char_gen.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/verilog/vga_char_ctrl_svga_timing_generation.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/verilog/vga_char_ctrl_video_out.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface_char_display.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface_char_gen.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface_char_gen_rom.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface_char_ram.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface_s3_vga_char_device.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface_svga_timing_generator.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/rtl/xxx/vga_char_interface_video_out.v
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/bin
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/bin/Makefile
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/log
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/out
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/dmp_define
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/dut
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/filelist
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/liblist
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/modellist
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/TB.defs
/socgen/trunk/projects/logic/ip/vga_char_ctrl/sim/run/default/test_define
/socgen/trunk/projects/logic/ip/vga_char_ctrl/syn
/socgen/trunk/projects/logic/sw/font
/socgen/trunk/projects/logic/sw/font/font.asm
/socgen/trunk/projects/logic/sw/font/Makefile
/socgen/trunk/projects/logic/sw/startup
/socgen/trunk/projects/logic/sw/startup/Makefile
/socgen/trunk/projects/logic/sw/startup/startup.asm
/socgen/trunk/projects/logic/sw/vga_font
/socgen/trunk/projects/logic/sw/vga_font/Makefile
/socgen/trunk/projects/logic/sw/vga_font/vga_font.asm
/socgen/trunk/projects/logic/sw/vga_startup_screen
/socgen/trunk/projects/logic/sw/vga_startup_screen/Makefile
/socgen/trunk/projects/logic/sw/vga_startup_screen/vga_startup_screen.asm
/socgen/trunk/projects/Mos6502
/socgen/trunk/projects/Mos6502/bin
/socgen/trunk/projects/Mos6502/bin/Makefile
/socgen/trunk/projects/Mos6502/children
/socgen/trunk/projects/Mos6502/children/logic
/socgen/trunk/projects/Mos6502/children/logic/ip
/socgen/trunk/projects/Mos6502/children/logic/ip/disp_io
/socgen/trunk/projects/Mos6502/children/logic/ip/io_module
/socgen/trunk/projects/Mos6502/children/logic/ip/ps2_interface
/socgen/trunk/projects/Mos6502/children/logic/ip/serial_rcvr
/socgen/trunk/projects/Mos6502/children/logic/ip/uart
/socgen/trunk/projects/Mos6502/children/logic/ip/vga_char_ctrl
/socgen/trunk/projects/Mos6502/ip
/socgen/trunk/projects/Mos6502/ip/T6502
/socgen/trunk/projects/Mos6502/ip/T6502/bin
/socgen/trunk/projects/Mos6502/ip/T6502/bin/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502/doc
/socgen/trunk/projects/Mos6502/ip/T6502/doc/copyright.v
/socgen/trunk/projects/Mos6502/ip/T6502/doc/geda
/socgen/trunk/projects/Mos6502/ip/T6502/doc/geda/drawing
/socgen/trunk/projects/Mos6502/ip/T6502/doc/geda/drawing/filelist
/socgen/trunk/projects/Mos6502/ip/T6502/doc/geda/drawing/sch
/socgen/trunk/projects/Mos6502/ip/T6502/doc/geda/drawing/sym
/socgen/trunk/projects/Mos6502/ip/T6502/doc/html
/socgen/trunk/projects/Mos6502/ip/T6502/doc/png
/socgen/trunk/projects/Mos6502/ip/T6502/doc/Readme.txt
/socgen/trunk/projects/Mos6502/ip/T6502/doc/spec.odt
/socgen/trunk/projects/Mos6502/ip/T6502/doc/timing
/socgen/trunk/projects/Mos6502/ip/T6502/rtl
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/variants
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/variants/T6502
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/variants/T6502/T6502_defines.v
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/T6502.v
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/T6502_alu.v
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/T6502_core.v
/socgen/trunk/projects/Mos6502/ip/T6502/rtl/verilog/T6502_fsm.v
/socgen/trunk/projects/Mos6502/ip/T6502/sim
/socgen/trunk/projects/Mos6502/ip/T6502/sim/bin
/socgen/trunk/projects/Mos6502/ip/T6502/sim/bin/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502/sim/log
/socgen/trunk/projects/Mos6502/ip/T6502/sim/out
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/dut
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/filelist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/liblist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/modellist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/t6507lp_alu_tb.v
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/alu_test/test_define
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/dut
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/filelist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/liblist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/modellist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/t6507lp_fsm_tb.v
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/fsm_test/test_define
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll/dut
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll/filelist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll/liblist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll/modellist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/io_poll/test_define
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test/dmp_define
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test/dut
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test/filelist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test/liblist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test/modellist
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test/TB.defs
/socgen/trunk/projects/Mos6502/ip/T6502/sim/run/prog_test/test_define
/socgen/trunk/projects/Mos6502/ip/T6502/syn
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/bsdl
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/bsdl/xc3s1200e_fg320_1532.bsd
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/core.v
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/debug
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/debug/fpga_load
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/debug/impact_bat
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/def_file
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/filelist
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/gate_sims
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/gate_sims/par
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/Makefile
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/sim
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/sim/bin
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/sim/log
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/sim/out
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/sim/run
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/target
/socgen/trunk/projects/Mos6502/ip/T6502/syn/Nexys2_io_poll/target/Nexys2
/socgen/trunk/projects/Mos6502/sw
/socgen/trunk/projects/Mos6502/sw/io_poll
/socgen/trunk/projects/Mos6502/sw/io_poll/io_poll.asm
/socgen/trunk/projects/Mos6502/sw/io_poll/Makefile
/socgen/trunk/projects/Mos6502/sw/Prog
/socgen/trunk/projects/Mos6502/sw/Prog/Makefile
/socgen/trunk/projects/Mos6502/sw/Prog/Prog.asm
/socgen/trunk/projects/Mos6502/sw/tim_1
/socgen/trunk/projects/Mos6502/sw/tim_1/Makefile
/socgen/trunk/projects/Mos6502/sw/tim_1/ok_no_jsr
/socgen/trunk/projects/Mos6502/sw/tim_1/tim_1.asm
/socgen/trunk/projects/Mos6502/sw/tim_1/tim_1.asm.xxx
/socgen/trunk/projects/Mos6502/sw/vga_font
/socgen/trunk/projects/Mos6502/sw/vga_font/Makefile
/socgen/trunk/projects/Mos6502/sw/vga_font/vga_font.asm
/socgen/trunk/projects/Mos6502/sw/vga_startup_screen
/socgen/trunk/projects/Mos6502/sw/vga_startup_screen/Makefile
/socgen/trunk/projects/Mos6502/sw/vga_startup_screen/vga_startup_screen.asm
/socgen/trunk/projects/pic_micro/children/logic/ip/vga_char_ctrl
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/README.txt
/socgen/trunk/projects/pic_micro/ip/soc_mouse/rtl/verilog/soc_mouse.v
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/sim/run/mouse_mrisc/liblist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Basys_mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/ip/soc_mouse/syn/Nexys2_mouse_mrisc/filelist
/socgen/trunk/projects/pic_micro/sw/vga_font
/socgen/trunk/projects/pic_micro/sw/vga_font/Makefile
/socgen/trunk/projects/pic_micro/sw/vga_font/vga_font.asm
/socgen/trunk/projects/pic_micro/sw/vga_startup_screen
/socgen/trunk/projects/pic_micro/sw/vga_startup_screen/Makefile
/socgen/trunk/projects/pic_micro/sw/vga_startup_screen/vga_startup_screen.asm
/socgen/trunk/targets/Nexys2/Pad_Ring.v
/socgen/trunk/tools/install/Ubuntu_10.4/Makefile

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