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[/] - Rev 8

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Last modification

Rev 8, 2003-03-26 16:00:16 GMT
Author: simons
Log message:
Automatic slave select signal generation added.

Path
/trunk/bench/verilog/spi_slave_model.v
/trunk/bench/verilog/tb_spi_top.v
/trunk/doc/spi.pdf
/trunk/doc/src/spi.doc
/trunk/rtl/verilog/spi_defines.v
/trunk/rtl/verilog/spi_top.v

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