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[/] [vivado/] [steel-core.srcs/] [sim_1/] [imports/] [steel-core/] [rtl/] [bench/] - Rev 11

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Last modification

  • Rev 11, 2020-10-15 00:43:51 GMT
  • Author: rafaelcalcada
  • Log message:
    New version
Path
/compliance
/compliance/I-ADD-01.elf.mem
/compliance/I-ADD-01.reference_output
/compliance/I-ADD-01.signature.output
/compliance/I-ADDI-01.elf.mem
/compliance/I-ADDI-01.reference_output
/compliance/I-ADDI-01.signature.output
/compliance/I-AND-01.elf.mem
/compliance/I-AND-01.reference_output
/compliance/I-AND-01.signature.output
/compliance/I-ANDI-01.elf.mem
/compliance/I-ANDI-01.reference_output
/compliance/I-ANDI-01.signature.output
/compliance/I-AUIPC-01.elf.mem
/compliance/I-AUIPC-01.reference_output
/compliance/I-AUIPC-01.signature.output
/compliance/I-BEQ-01.elf.mem
/compliance/I-BEQ-01.reference_output
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/compliance/I-BGE-01.elf.mem
/compliance/I-BGE-01.reference_output
/compliance/I-BGE-01.signature.output
/compliance/I-BGEU-01.elf.mem
/compliance/I-BGEU-01.reference_output
/compliance/I-BGEU-01.signature.output
/compliance/I-BLT-01.elf.mem
/compliance/I-BLT-01.reference_output
/compliance/I-BLT-01.signature.output
/compliance/I-BLTU-01.elf.mem
/compliance/I-BLTU-01.reference_output
/compliance/I-BLTU-01.signature.output
/compliance/I-BNE-01.elf.mem
/compliance/I-BNE-01.reference_output
/compliance/I-BNE-01.signature.output
/compliance/I-CSRRC-01.elf.mem
/compliance/I-CSRRC-01.reference_output
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/compliance/I-CSRRCI-01.elf.mem
/compliance/I-CSRRCI-01.reference_output
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/compliance/I-CSRRS-01.elf.mem
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/compliance/I-CSRRSI-01.elf.mem
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/compliance/I-DELAY_SLOTS-01.elf.mem
/compliance/I-DELAY_SLOTS-01.reference_output
/compliance/I-DELAY_SLOTS-01.signature.output
/compliance/I-EBREAK-01.elf.mem
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/compliance/I-ECALL-01.elf.mem
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/compliance/I-ENDIANESS-01.elf.mem
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/compliance/I-IO-01.elf.mem
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/compliance/I-MISALIGN_JMP-01.elf.mem
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/compliance/I-MISALIGN_LDST-01.elf.mem
/compliance/I-MISALIGN_LDST-01.reference_output
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/compliance/I-OR-01.elf.mem
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/compliance/I-ORI-01.elf.mem
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/compliance/I-SB-01.elf.mem
/compliance/I-SB-01.reference_output
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/compliance/I-SH-01.elf.mem
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/compliance/I-SLTU-01.reference_output
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/compliance/I-SRAI-01.reference_output
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/compliance/I-SRLI-01.elf.mem
/compliance/I-SRLI-01.reference_output
/compliance/I-SRLI-01.signature.output
/compliance/I-SUB-01.elf.mem
/compliance/I-SUB-01.reference_output
/compliance/I-SUB-01.signature.output
/compliance/I-SW-01.elf.mem
/compliance/I-SW-01.reference_output
/compliance/I-SW-01.signature.output
/compliance/I-XOR-01.elf.mem
/compliance/I-XOR-01.reference_output
/compliance/I-XOR-01.signature.output
/compliance/I-XORI-01.elf.mem
/compliance/I-XORI-01.reference_output
/compliance/I-XORI-01.signature.output
/compliance/verify.sh
/coremark
/coremark/coremark.h
/coremark/coremark.md5
/coremark/core_list_join.c
/coremark/core_main.c
/coremark/core_matrix.c
/coremark/core_state.c
/coremark/core_util.c
/coremark/LICENSE.md
/coremark/Makefile
/coremark/README.md
/coremark/steel
/coremark/steel/core_portme.c
/coremark/steel/core_portme.h
/coremark/steel/core_portme.mak
/coremark/steel/cvt.c
/coremark/steel/ee_printf.c
/docs
/docs/config.md
/docs/details.md
/docs/docs.pdf
/docs/examplesoc.md
/docs/extra.css
/docs/extra.js
/docs/getting.md
/docs/images
/docs/images/dfetch_wave.png
/docs/images/dwrite_wave.png
/docs/images/ifetch_wave.png
/docs/images/irq_wave.png
/docs/images/riscv-steel-32.png
/docs/images/steel-fsm.png
/docs/images/steel-hello.png
/docs/images/steel-interface.png
/docs/images/steel-logo.png
/docs/images/steel-logo.svg
/docs/images/steel-pipe.png
/docs/images/steel-soc.png
/docs/images/timeup_wave.png
/docs/index.md
/docs/software.md
/docs/steelio.md
/docs/timing.md
/docs/traps.md
/docs/uarch.md
/LICENSE.md
/mkdocs.yml
/README.md
/riscv-tests
/riscv-tests/memgen.sh
/riscv-tests/rv32ui-p-add
/riscv-tests/rv32ui-p-add.dump
/riscv-tests/rv32ui-p-add.mem
/riscv-tests/rv32ui-p-addi
/riscv-tests/rv32ui-p-addi.dump
/riscv-tests/rv32ui-p-addi.mem
/riscv-tests/rv32ui-p-and
/riscv-tests/rv32ui-p-and.dump
/riscv-tests/rv32ui-p-and.mem
/riscv-tests/rv32ui-p-andi
/riscv-tests/rv32ui-p-andi.dump
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/riscv-tests/rv32ui-p-auipc
/riscv-tests/rv32ui-p-auipc.dump
/riscv-tests/rv32ui-p-auipc.mem
/riscv-tests/rv32ui-p-beq
/riscv-tests/rv32ui-p-beq.dump
/riscv-tests/rv32ui-p-beq.mem
/riscv-tests/rv32ui-p-bge
/riscv-tests/rv32ui-p-bge.dump
/riscv-tests/rv32ui-p-bge.mem
/riscv-tests/rv32ui-p-bgeu
/riscv-tests/rv32ui-p-bgeu.dump
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/riscv-tests/rv32ui-p-blt
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/riscv-tests/rv32ui-p-bltu.mem
/riscv-tests/rv32ui-p-bne
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/riscv-tests/rv32ui-p-fence_i
/riscv-tests/rv32ui-p-fence_i.dump
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/riscv-tests/rv32ui-p-jal
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/riscv-tests/rv32ui-p-jalr
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/riscv-tests/rv32ui-p-jalr.mem
/riscv-tests/rv32ui-p-lb
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/riscv-tests/rv32ui-p-or
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/riscv-tests/rv32ui-p-ori
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/riscv-tests/rv32ui-p-sh
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/riscv-tests/rv32ui-p-simple
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/riscv-tests/rv32ui-p-sll
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/riscv-tests/rv32ui-p-slli
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/riscv-tests/rv32ui-p-slt
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/rtl
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/rtl/imm_generator.v
/rtl/integer_file.v
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/rtl/machine_control.v
/rtl/steel_top.v
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/soc
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/util
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/util/hello
/util/hello.c
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/vivado
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