URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

[/] - Rev 7

Rev 7, 2001-05-17 18:34:18 GMT
Author: gorban
Log message:
First 'stable' release. Should be sythesizable now. Also added new header.

Path
/trunk/verilog/FIFO_inc.v
/trunk/verilog/ToDo.txt
/trunk/verilog/UART_defines.v
/trunk/verilog/UART_FIFO.v
/trunk/verilog/UART_FIFO_t.v
/trunk/verilog/UART_receiver.v
/trunk/verilog/UART_regs.v
/trunk/verilog/UART_RX_FIFO.v
/trunk/verilog/UART_test.v
/trunk/verilog/UART_top.v
/trunk/verilog/UART_transmitter.v
/trunk/verilog/UART_TX_FIFO.v
/trunk/verilog/UART_wb.v