URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] [sim/] - Rev 28

Rev 28, 2010-03-09 13:12:02 GMT
Author: mikaeljf
Log message:
Fixed typos and updated the rtl Makefile and Altera-Modelsim script. Modified the counter-excel file and added missing module 'dff_sr.v'.

Path
/versatile_mem_ctrl/trunk/bench/tb.v
/versatile_mem_ctrl/trunk/rtl/verilog/dff_sr.v
/versatile_mem_ctrl/trunk/rtl/verilog/Makefile
/versatile_mem_ctrl/trunk/rtl/verilog/versatile_counter.xls
/versatile_mem_ctrl/trunk/rtl/verilog/versatile_mem_ctrl_ip.v
/versatile_mem_ctrl/trunk/rtl/verilog/versatile_mem_ctrl_top.v
/versatile_mem_ctrl/trunk/sim/rtl_sim/bin/sim_altera.tcl