Hello, This is my first post to opencores.org, my name is Michal and I am playing with 128/192 AES core. Unfortunately, I cannot encrypt properly data with Altera Quartus II (5.1, SP2) project. When compiling core I receive strange warnings: Warning (10230): Verilog HDL assignment warning at aes192.v(246): truncated value with size 32 to match size of target (4) Warning (10271): Verilog HDL Case Statement warning at subbytes.v (233): size of case item expression (32) exceeds the size of the case expression (5) I get wrong data_o value, it doesn't match the value from fips vectors. I tried also AES128 and it worked fine. Do you have a clue what may be wrong? If you need any additional information, please let me know. Thank you for your time, Regards, Michal _______________________________________________ http://www.opencores.org/mailman/listinfo/cores