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SystemC to VHDL
by frnagel on Jan 28, 2004 |
frnagel
Posts: 2 Joined: Jun 21, 2009 Last seen: Apr 17, 2012 |
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Someone knows a translator from SystemC to VHDL (free, of course) ?
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SystemC to VHDL
by Unknown on Jan 28, 2004 |
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> Someone knows a translator from SystemC to VHDL (free, of course) ?
That kind of translator can only exist for RT-Level SystemC and why would you write that?. A translator tool of (any) SystemC to VHDL is not feasible. Refinement can just as easily be done from SystemC directly to VHDL instead of the (bulky) RT SystemC. With the co-simulator tools VHDL-SystemC available who would take the time to write such a translator tool? Steven |
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SystemC to VHDL
by Unknown on Jan 28, 2004 |
Not available! | ||
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At 14:14 28/01/2004, you wrote:
> Someone knows a translator from SystemC to VHDL (free, of course) ?
That kind of translator can only exist for RT-Level SystemC and why would
you write that?. A translator tool of (any) SystemC to VHDL is not
feasible. Refinement can just as easily be done from SystemC directly to
VHDL instead of the (bulky) RT SystemC. With the co-simulator tools
VHDL-SystemC available who would take the time to write such a translator tool?
Steven
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
And what are this tools? Do you know some tool that refine - translates from Behavioural to RTL - SystemC? |
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SystemC to VHDL
by Unknown on Jan 28, 2004 |
Not available! | ||
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And what are this tools?
Do you know some tool that refine - translates from Behavioural to RTL - SystemC? The tool = the human brain. :) Steven |
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SystemC to VHDL
by Unknown on May 14, 2004 |
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HI,
did u find a SystemC to vhdl converter? I need one too..:)
----- Original Message -----
From: Redant Stevenredant at i...>
To:
Date: Wed Jan 28 17:14:19 CET 2004
Subject: [oc] SystemC to VHDL
> Someone knows a translator from SystemC to VHDL (free, of
course) ? That kind of translator can only exist for RT-Level SystemC and why would you write that?. A translator tool of (any) SystemC to VHDL is not feasible. Refinement can just as easily be done from SystemC directly to VHDL instead of the (bulky) RT SystemC. With the co-simulator tools VHDL-SystemC available who would take the time to write such a translator tool? Steven |
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