Hey I'm using Designer of Libero to compile my program but when I compiled it I received an error that says "Error: [too_many_blocks]: Netlist contains too many blocks (12963) for the part (maximum = 3072)." Thus I have to many core cells 12963 and it won't fit on to the FPGA ( APA075 ). Does any body have an idea how to decrease the core cells. ( or what may cause the cell count to increase dramatically ) -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20070929/d0b0925e/attachment.htm