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avr_risc core
by Unknown on Feb 22, 2008 |
Not available! | ||
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I took work Yap Zi He "Building a RISC microcontroller in an FPGA" and
have improved it to level Atmega8535(about 130 instruction set, fpga, fully synthesizable). If someone need me project, i can lay out it on a resource. |
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avr_risc core
by JohnDay on Feb 23, 2008 |
JohnDay
Posts: 7 Joined: Jul 18, 2009 Last seen: Dec 10, 2010 |
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Well, I for one would be most interested!
What FPGA have you tried it in? John At 04:26 AM 2/22/2008, you wrote:
I took work Yap Zi He "Building a RISC microcontroller in an FPGA" and
have improved it to level Atmega8535(about 130 instruction set, fpga,
fully synthesizable). If someone need me project, i can lay out it on
a resource.
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
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avr_risc core
by ceo on Feb 23, 2008 |
ceo
Posts: 1 Joined: Aug 2, 2010 Last seen: Aug 19, 2010 |
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looking to build secure microcontroller in fpga, can i get verilog for your
micro? maybe you can partner to build my chip demo.
email me directly at ceo at onecardconnect.com
----- Original Message -----
From: yura_shkondin at pochta.ruyura_shkondin at p...>
To:
Date: Fri Feb 22 10:26:32 CET 2008
Subject: [oc] avr_risc core
I took work Yap Zi He "Building a RISC microcontroller in an
FPGA" and have improved it to level Atmega8535(about 130 instruction set, fpga, fully synthesizable). If someone need me project, i can lay out it on a resource. |
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avr_risc core
by Unknown on Feb 27, 2008 |
Not available! | ||
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Hi,
I would interested in checking it out.
Regards
Herbert Larbie
----- Original Message -----
From: yura_shkondin at pochta.ruyura_shkondin at p...>
To:
Date: Fri Feb 22 10:26:32 CET 2008
Subject: [oc] avr_risc core
I took work Yap Zi He "Building a RISC microcontroller in an
FPGA" and have improved it to level Atmega8535(about 130 instruction set, fpga, fully synthesizable). If someone need me project, i can lay out it on a resource. |
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avr_risc core
by Unknown on Feb 29, 2008 |
Not available! | ||
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Hi
I would also be interested in getting at least more information.
Mogens Pelle
mpe at ihk.dk
-----Original Message-----
From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org]
On Behalf Of John Day
Sent: 23. februar 2008 16:00
To: Discussion list about free open source IP cores
Subject: Re: [oc] avr_risc core
Well, I for one would be most interested!
What FPGA have you tried it in?
John
At 04:26 AM 2/22/2008, you wrote:
I took work Yap Zi He "Building a RISC microcontroller in an FPGA" and
have improved it to level Atmega8535(about 130 instruction set, fpga,
fully synthesizable). If someone need me project, i can lay out it on
a resource.
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
--
No virus found in this incoming message.
Checked by AVG Free Edition.
Version: 7.5.516 / Virus Database: 269.20.9/1291 - Release Date:
2/21/2008 11:05 AM
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
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avr_risc core
by JohnDay on Mar 5, 2008 |
JohnDay
Posts: 7 Joined: Jul 18, 2009 Last seen: Dec 10, 2010 |
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I have had a look at the original paper.
Is it possible to get the code? I have used a lot of AVR processors
and would love to try one in an FPGA. I am using Altera Cycolne II
and III devices. Generally I start from the NIOS dev kit with an EP2C35.
Kindly, John
At 04:26 AM 2/22/2008, yura_shkondin at pochta.ru wrote:
I took work Yap Zi He "Building a RISC microcontroller in an FPGA" and
have improved it to level Atmega8535(about 130 instruction set, fpga,
fully synthesizable). If someone need me project, i can lay out it on
a resource.
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
--
No virus found in this incoming message.
Checked by AVG Free Edition.
Version: 7.5.516 / Virus Database: 269.20.9/1291 - Release Date:
2/21/2008 11:05 AM
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