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FPGA based Co-processor for reducing CPU burden on TCP/IP processing
by Unknown on Mar 11, 2008 |
Not available! | ||
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Hi All:
I am new in FPGA design and am currently doing a personal research project on how to implement a co-processor using HyperTransport technology. The co-processor is to be used to reduce the burden of the host CPU (AMD Opteron) in processing TCP/IP protocols.
Can you provide me some ideas on this to come up with a rough prototype of the project?
Your help is highly appreciated.
Thanks a lot,
Ricky
____________________________________________________________________________________
Never miss a thing. Make Yahoo your home page.
http://www.yahoo.com/r/hs
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FPGA based Co-processor for reducing CPU burden on TCP/IP processing
by Unknown on Mar 11, 2008 |
Not available! | ||
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hi ricky
there are at least two companies out there with products and services
to support your idea. also cray is selling a high performance computing
system with such a combination.
http://www.drccomputer.com/drc/modules.html
http://www.xtremedatainc.com/index.php?option=com_content&view=article&id=102&Itemid=156
yes, anything closed and high priced.
if you had the idea to make an homebrew board for that, for get it.
hypertransport is to fast to make a simple board by your self. if you
have a lot of experience with hardware design it's still possible but
you need a lot of time and realy good tools to manage it.
what is your background? (software engineer, hardware engineer,
embedded developer,...)
greetings
christoph
Am Tue, 11 Mar 2008 01:37:19 -0700 (PDT)
schrieb Ricky James Allam rickyjamesa at yahoo.com>:
Hi All:
I am new in FPGA design and am currently doing a personal research
project on how to implement a co-processor using HyperTransport
technology. The co-processor is to be used to reduce the burden of
the host CPU (AMD Opteron) in processing TCP/IP protocols.
Can you provide me some ideas on this to come up with a rough
prototype of the project?
Your help is highly appreciated.
Thanks a lot,
Ricky
____________________________________________________________________________________
Never miss a thing. Make Yahoo your home page.
http://www.yahoo.com/r/hs
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
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FPGA based Co-processor for reducing CPU burden on TCP/IP processing
by UmairSiddiqui on Mar 12, 2008 |
UmairSiddiqui
Posts: 21 Joined: Aug 13, 2005 Last seen: Sep 19, 2016 |
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hey man, for personal research I think check this
http://www.em.avnet.com/evk/home/0,4534,CID%253D7816%2526CCD%253DUSA%2526SID%253DNoNav%2526DID%253DDF2%2526LID%253DNoNav%25255F%2526BID%253DDF2%2526CTP%253DEVK,00.html
Avnet Spartan 3 board, it has 10/100 Ethernet MAC, and PCI (not PCIe).
or some other board with similar facilities. (downside of this board
that it contains 1 M SRAM, it should contain 64/128M SDRAM,
search different catalogs and try to get more gates and DRAM bits)
-You can attach it to your PC PCI slot.
-Both PCI and Ethernet MAC Cores are available on OpenCores
-the rest of the FPGA will contain your TOE logic.
and you also need to write the software driver of this board.
i think if you can do enough TOE with this much hardware and PCI would
be more the enough for Packet DMA transfers.
On Wed, Mar 12, 2008 at 2:05 AM, Christoph Zimmermann
nussgipfel at brain4free.org> wrote:
hi ricky
there are at least two companies out there with products and services
to support your idea. also cray is selling a high performance computing
system with such a combination.
http://www.drccomputer.com/drc/modules.html
http://www.xtremedatainc.com/index.php?option=com_content&view=article&id=102&Itemid=156
yes, anything closed and high priced.
if you had the idea to make an homebrew board for that, for get it.
hypertransport is to fast to make a simple board by your self. if you
have a lot of experience with hardware design it's still possible but
you need a lot of time and realy good tools to manage it.
what is your background? (software engineer, hardware engineer,
embedded developer,...)
greetings
christoph
Am Tue, 11 Mar 2008 01:37:19 -0700 (PDT)
schrieb Ricky James Allam rickyjamesa at yahoo.com>:
> Hi All:
>
> I am new in FPGA design and am currently doing a personal research
> project on how to implement a co-processor using HyperTransport
> technology. The co-processor is to be used to reduce the burden of
> the host CPU (AMD Opteron) in processing TCP/IP protocols.
>
> Can you provide me some ideas on this to come up with a rough
> prototype of the project?
>
> Your help is highly appreciated.
>
> Thanks a lot,
>
> Ricky
>
>
>
> ____________________________________________________________________________________
> Never miss a thing. Make Yahoo your home page.
> http://www.yahoo.com/r/hs
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/cores
>
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
|
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FPGA based Co-processor for reducing CPU burden on TCP/IP processing
by Unknown on Mar 13, 2008 |
Not available! | ||
|
Does the PCI core on OpenCores support DMA? I don't have any Verilog
experience, only some VHDL. I have this Avnet PCI development board
and am trying to make a PCI interface for an ADSL modem chipset.
Regards,
Nathan
On 12/03/2008, Umair Siddiqui umairsiddiqui84 at gmail.com> wrote:
hey man, for personal research I think check this
http://www.em.avnet.com/evk/home/0,4534,CID%253D7816%2526CCD%253DUSA%2526SID%253DNoNav%2526DID%253DDF2%2526LID%253DNoNav%25255F%2526BID%253DDF2%2526CTP%253DEVK,00.html
Avnet Spartan 3 board, it has 10/100 Ethernet MAC, and PCI (not PCIe).
or some other board with similar facilities. (downside of this board
that it contains 1 M SRAM, it should contain 64/128M SDRAM,
search different catalogs and try to get more gates and DRAM bits)
-You can attach it to your PC PCI slot.
-Both PCI and Ethernet MAC Cores are available on OpenCores
-the rest of the FPGA will contain your TOE logic.
and you also need to write the software driver of this board.
i think if you can do enough TOE with this much hardware and PCI would
be more the enough for Packet DMA transfers.
On Wed, Mar 12, 2008 at 2:05 AM, Christoph Zimmermann
nussgipfel at brain4free.org> wrote:
> hi ricky
>
> there are at least two companies out there with products and services
> to support your idea. also cray is selling a high performance computing
> system with such a combination.
> http://www.drccomputer.com/drc/modules.html
> http://www.xtremedatainc.com/index.php?option=com_content&view=article&id=102&Itemid=156
>
> yes, anything closed and high priced.
>
> if you had the idea to make an homebrew board for that, for get it.
> hypertransport is to fast to make a simple board by your self. if you
> have a lot of experience with hardware design it's still possible but
> you need a lot of time and realy good tools to manage it.
>
> what is your background? (software engineer, hardware engineer,
> embedded developer,...)
>
> greetings
> christoph
>
> Am Tue, 11 Mar 2008 01:37:19 -0700 (PDT)
> schrieb Ricky James Allam rickyjamesa at yahoo.com>:
>
>
>
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
> > Hi All:
> >
> > I am new in FPGA design and am currently doing a personal research
> > project on how to implement a co-processor using HyperTransport
> > technology. The co-processor is to be used to reduce the burden of
> > the host CPU (AMD Opteron) in processing TCP/IP protocols.
> >
> > Can you provide me some ideas on this to come up with a rough
> > prototype of the project?
> >
> > Your help is highly appreciated.
> >
> > Thanks a lot,
> >
> > Ricky
> >
> >
> >
> > ____________________________________________________________________________________
> > Never miss a thing. Make Yahoo your home page.
> > http://www.yahoo.com/r/hs
> >
> > _______________________________________________
> > http://www.opencores.org/mailman/listinfo/cores
> >
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/cores
>
|
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FPGA based Co-processor for reducing CPU burden on TCP/IP processing
by Unknown on Mar 13, 2008 |
Not available! | ||
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Nathan Williams wrote:
Does the PCI core on OpenCores support DMA? I don't have any Verilog
You can hook the opencores wishbone DMA controller to the back end of the
opencores PCI controller, so - yes.
Regards,
--
Mark McDougall, Engineer
Virtual Logic Pty Ltd, http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
experience, only some VHDL. I have this Avnet PCI development board and am trying to make a PCI interface for an ADSL modem chipset. |
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FPGA based Co-processor for reducing CPU burden on TCP/IP processing
by Unknown on Apr 5, 2008 |
Not available! | ||
|
Ricky James Allam wrote:
Hi All:
I am new in FPGA design and am currently doing a personal research project on how to implement a co-processor using HyperTransport technology. The co-processor is to be used to reduce the burden of the host CPU (AMD Opteron) in processing TCP/IP protocols. Can you provide me some ideas on this to come up with a rough prototype of the project? Your help is highly appreciated. I hate to say it, but it probably makes more sense to integrate the network interface -- both to reduce memory bandwidth and give you more direct control over it. At that point, you're a TOE Ethernet card. -hpa |
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