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Re: T80 Core x by Unknown on May 6, 2008			Not available!
Could you try the same test with the latest version of the T80 core on the www.fpgaarcade.com website. If that version fails I will fix it. Best, MikeJ p.s. anybody know how I can merge this one back into the opencores repository? <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon.costa at gmail.com</A> writes: [q] I would appreciate any help from people who used the T80 core on this. This is more a multi-discipline problem, because it relates to Z80 assembly and VHDL: I have this logic to read/write into memory. DI_CPU is the Z80 input data bus. DO_CPU is the Z80 output data bus. A is the Z80 address bus. The others signals are for video ram (block memory) and other devices. This process is to store data on memory: writevram: process(Clk_Z80) begin if Clk_Z80'event and Clk_Z80 = '1' then if A >= x"2000" and A <= x"27FF" then vram_addra_sig <= A - x"2000"; if Wr_n = '0' and MReq_n = '0' then vram_dina_sig <= DO_CPU; vram_wea_sig <= '0'; else vram_wea_sig <= '1'; end if; else vram_wea_sig <= '1'; end if; end if; end process; And this continuous assignment is to read memory and input from other devices and send to the Z80: DI_CPU <= D_ROM when (Rd_n = '0' and MReq_n = '0' and A < x"2000") else ("0000" & SW) when (IORQ_n = '0' and Rd_n = '0' and A(7 downto 0) = x"20") else ("0000" & KEY) when (IORQ_n = '0' and Rd_n = '0' and A(7 downto 0) = x"30") else ps2_ascii_reg when (IORQ_n = '0' and Rd_n = '0' and A(7 downto 0) = x"80"); Now the program in Z80 assembly. This next small program will run without problems, and the byte will be stored in memory. I can have a buch of such commands,in sequence, and they will run and the data will be stored in memory. ld a,41h ; define data to store ld (8250),a ; store the data in memory position 8250 decimal ld a,42h ld (8251),a However, if I try to write a block of data, it will fail, and the data will not be written into memory: ld de,texto ; data to store in memory ld bc,2000h ; address of memory to store the data loop1: ld a,(de) ; read 1 character or a ; compares with zero jr z,next1 ; if zero, then end of text ld (bc),a ; store character in ram inc bc ; point to next ram position inc de ; point to next character jr loop1 ; go to store next character texto: db "Testing T80 Core " db 0 -- So, what do you think it is happening? I have considered a T80 bug, but have not come to a definitive test to prove that. In the other hand, I really think there is a problem with my logic. I am a beginner with VHDL and FPGAs. The memory model were generated using coregenerator (xilinx) and implemented in a Spartan 3E. The problem does not occur when I use quartus and implement the design on a DE1 board. Any thoughts? Ideia? I really appreciate. Thanks. _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> [/q] Could you try the same test with the latest version of the T80 core on the www.fpgaarcade.com website. If that version fails I will fix it. Best, MikeJ p.s. anybody know how I can merge this one back into the opencores repository? ronivon.costa at gmail.com writes: I would appreciate any help from people who used the T80 core on this. This is more a multi-discipline problem, because it relates to Z80 assembly and VHDL: I have this logic to read/write into memory. DI_CPU is the Z80 input data bus. DO_CPU is the Z80 output data bus. A is the Z80 address bus. The others signals are for video ram (block memory) and other devices. This process is to store data on memory: writevram: process(Clk_Z80) begin if Clk_Z80'event and Clk_Z80 = '1' then if A >= x"2000" and A http://www.opencores.org/mailman/listinfo/cores

Re: T80 Core x by Unknown on May 7, 2008			Not available!
Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. Roni. ----- Original Message ----- From: mike johnson<<A HREF="http://www.opencores.org/mailman/listinfo/cores">mikej at f...</A>> To: Date: Tue May 6 12:37:31 CEST 2008 Subject: [oc] Re: T80 Core x [q] Could you try the same test with the latest version of the T80 core on the www.fpgaarcade.com website. If that version fails I will fix it. Best, MikeJ p.s. anybody know how I can merge this one back into the opencores repository? ronivon.costa at gmail.com writes: [q]> I would appreciate any help from people who used the T80 core [/q] on this. [q]> This is more a multi-discipline problem, because it relates to [/q] Z80 [q]> assembly and VHDL: > > I have this logic to read/write into memory. > > DI_CPU is the Z80 input data bus. > DO_CPU is the Z80 output data bus. > A is the Z80 address bus. > > The others signals are for video ram (block memory) and other [/q] devices. [q]> > This process is to store data on memory: > > writevram: process(Clk_Z80) > begin > if Clk_Z80'event and Clk_Z80 = '1' then > if A >= x"2000" and A <= x"27FF" [/q] then [q]> vram_addra_sig <= A - x"2000"; > if Wr_n = '0' and MReq_n = '0' then > vram_dina_sig <= DO_CPU; > vram_wea_sig <= '0'; > else > vram_wea_sig <= '1'; > end if; > else > vram_wea_sig <= '1'; > end if; > end if; > end process; > > > And this continuous assignment is to read memory and input [/q] from other [q]> devices and send to the Z80: > > DI_CPU <= D_ROM when (Rd_n = '0' and MReq_n = '0' and A [/q] < x"2000") else [q]> ("0000" & SW) when (IORQ_n = '0' and Rd_n = [/q] '0' and A(7 downto 0) = [q]> x"20") else > ("0000" & KEY) when (IORQ_n = '0' and Rd_n = [/q] '0' and A(7 downto 0) [q]> = x"30") else > ps2_ascii_reg when (IORQ_n = '0' and Rd_n = '0' and A(7 [/q] downto 0) = [q]> x"80"); > > > Now the program in Z80 assembly. > This next small program will run without problems, and the [/q] byte will [q]> be stored in memory. I can have a buch of such commands,in [/q] sequence, [q]> and they will run and the data will be stored in memory. > > ld a,41h ; define data to store > ld (8250),a ; store the data in memory position 8250 decimal > ld a,42h > ld (8251),a > > However, if I try to write a block of data, it will fail, and [/q] the data [q]> will not be written into memory: > > ld de,texto ; data to store in memory > ld bc,2000h ; address of memory to store the data > loop1: > ld a,(de) ; read 1 character > or a ; compares with zero > jr z,next1 ; if zero, then end of text > ld (bc),a ; store character in ram > inc bc ; point to next ram position > inc de ; point to next character > jr loop1 ; go to store next character > texto: > db "Testing T80 Core " > db 0 > > -- > > So, what do you think it is happening? > I have considered a T80 bug, but have not come to a definitive [/q] test to [q]> prove that. > > In the other hand, I really think there is a problem with my [/q] logic. I [q]> am a beginner with VHDL and FPGAs. > > The memory model were generated using coregenerator (xilinx) [/q] and [q]> implemented in a Spartan 3E. > The problem does not occur when I use quartus and implement [/q] the design [q]> on a DE1 board. > > Any thoughts? Ideia? I really appreciate. > Thanks. > _______________________________________________ > <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> > [/q] [/q] Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. Roni. ----- Original Message ----- From: mike johnsonmikej at f...> To: Date: Tue May 6 12:37:31 CEST 2008 Subject: [oc] Re: T80 Core x Could you try the same test with the latest version of the T80 core on the www.fpgaarcade.com website. If that version fails I will fix it. Best, MikeJ p.s. anybody know how I can merge this one back into the opencores repository? ronivon.costa at gmail.com writes: > I would appreciate any help from people who used the T80 core on this. > This is more a multi-discipline problem, because it relates to Z80 > assembly and VHDL: > > I have this logic to read/write into memory. > > DI_CPU is the Z80 input data bus. > DO_CPU is the Z80 output data bus. > A is the Z80 address bus. > > The others signals are for video ram (block memory) and other devices. > > This process is to store data on memory: > > writevram: process(Clk_Z80) > begin > if Clk_Z80'event and Clk_Z80 = '1' then > if A >= x"2000" and A then > vram_addra_sig > if Wr_n = '0' and MReq_n = '0' then > vram_dina_sig > vram_wea_sig > else > vram_wea_sig > end if; > else > vram_wea_sig > end if; > end if; > end process; > > > And this continuous assignment is to read memory and input from other > devices and send to the Z80: > > DI_CPU > ("0000" & SW) when (IORQ_n = '0' and Rd_n = '0' and A(7 downto 0) = > x"20") else > ("0000" & KEY) when (IORQ_n = '0' and Rd_n = '0' and A(7 downto 0) > = x"30") else > ps2_ascii_reg when (IORQ_n = '0' and Rd_n = '0' and A(7 downto 0) = > x"80"); > > > Now the program in Z80 assembly. > This next small program will run without problems, and the byte will > be stored in memory. I can have a buch of such commands,in sequence, > and they will run and the data will be stored in memory. > > ld a,41h ; define data to store > ld (8250),a ; store the data in memory position 8250 decimal > ld a,42h > ld (8251),a > > However, if I try to write a block of data, it will fail, and the data > will not be written into memory: > > ld de,texto ; data to store in memory > ld bc,2000h ; address of memory to store the data > loop1: > ld a,(de) ; read 1 character > or a ; compares with zero > jr z,next1 ; if zero, then end of text > ld (bc),a ; store character in ram > inc bc ; point to next ram position > inc de ; point to next character > jr loop1 ; go to store next character > texto: > db "Testing T80 Core " > db 0 > > -- > > So, what do you think it is happening? > I have considered a T80 bug, but have not come to a definitive test to > prove that. > > In the other hand, I really think there is a problem with my logic. I > am a beginner with VHDL and FPGAs. > > The memory model were generated using coregenerator (xilinx) and > implemented in a Spartan 3E. > The problem does not occur when I use quartus and implement the design > on a DE1 board. > > Any thoughts? Ideia? I really appreciate. > Thanks. > _______________________________________________ > http://www.opencores.org/mailman/listinfo/cores >

Re: T80 Core x by Unknown on May 14, 2008			Not available!
<A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon.costa at gmail.com</A> wrote: [q] Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80.[/q] For what it's worth, I have a successful project using T80 at: <A HREF="http://www.abc80.org/~hpa/fpga/">http://www.abc80.org/~hpa/fpga/</A> I had to make a few changes to the T80 core to make it work. -hpa ronivon.costa at gmail.com wrote: Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. For what it's worth, I have a successful project using T80 at: http://www.abc80.org/~hpa/fpga/ I had to make a few changes to the T80 core to make it work. -hpa

Re: T80 Core x by Unknown on May 14, 2008			Not available!
The T80 is working just good. What I meant is, htat using the Mike's release did not change the behaviour of my project. I managed to identify ad fix the problem, which was related to mixing latches with rising edge flip flops. (at seems this is what I think). I moved all Z80 bus inputs/outputs outside processes. I have already updated opencores with the new files. It is working great. Thanks 2008/5/14 H. Peter Anvin <<A HREF="http://www.opencores.org/mailman/listinfo/cores">hpa at zytor.com</A>>: [q] <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon.costa at gmail.com</A> wrote: [q] Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. [/q] For what it's worth, I have a successful project using T80 at: <A HREF="http://www.abc80.org/~hpa/fpga/">http://www.abc80.org/~hpa/fpga/</A> <<A HREF="http://www.abc80.org/%7Ehpa/fpga/">http://www.abc80.org/%7Ehpa/fpga/</A>> I had to make a few changes to the T80 core to make it work. -hpa _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> [/q] -- -- Visit my personal page: <A HREF="http://ronivon.costa.googlepages.com/">http://ronivon.costa.googlepages.com/</A> -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon at hotmail.com</A> -------------- next part -------------- An HTML attachment was scrubbed... URL: <A HREF="http://www.opencores.org/forums.cgi/cores/attachments/20080514/b62335b9/attachment-0001.html">http://www.opencores.org/forums.cgi/cores/attachments/20080514/b62335b9/attachment-0001.html</A> The T80 is working just good. What I meant is, htat using the Mike's release did not change the behaviour of my project. I managed to identify ad fix the problem, which was related to mixing latches with rising edge flip flops. (at seems this is what I think). I moved all Z80 bus inputs/outputs outside processes. I have already updated opencores with the new files. It is working great. Thanks 2008/5/14 H. Peter Anvin hpa at zytor.com>: ronivon.costa at gmail.com wrote: Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. For what it's worth, I have a successful project using T80 at: http://www.abc80.org/~hpa/fpga/ http://www.abc80.org/%7Ehpa/fpga/> I had to make a few changes to the T80 core to make it work. -hpa _______________________________________________ http://www.opencores.org/mailman/listinfo/cores -- -- Visit my personal page: http://ronivon.costa.googlepages.com/ -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: ronivon at hotmail.com -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080514/b62335b9/attachment-0001.html

Re: T80 Core x by MikeJ on May 14, 2008			MikeJ Posts: 10 Joined: Jan 16, 2002 Last seen: Feb 9, 2021
While we are on the subject I had assumed that only the project originator could update the repository. I see this isn't the case as Andreas has modified some of the T80 files. Is there any reason why I could not merge in the fpgaarcade.com one into the opencores repository? /Mike ----- Original Message ----- From: Ronivon Costa To: Discussion list about free open source IP cores Sent: Wednesday, May 14, 2008 9:57 AM Subject: Re: [oc] Re: T80 Core x The T80 is working just good. What I meant is, htat using the Mike's release did not change the behaviour of my project. I managed to identify ad fix the problem, which was related to mixing latches with rising edge flip flops. (at seems this is what I think). I moved all Z80 bus inputs/outputs outside processes. I have already updated opencores with the new files. It is working great. Thanks 2008/5/14 H. Peter Anvin <<A HREF="http://www.opencores.org/mailman/listinfo/cores">hpa at zytor.com</A>>: <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon.costa at gmail.com</A> wrote: Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. For what it's worth, I have a successful project using T80 at: <A HREF="http://www.abc80.org/~hpa/fpga/">http://www.abc80.org/~hpa/fpga/</A> I had to make a few changes to the T80 core to make it work. -hpa _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> -- -- Visit my personal page: <A HREF="http://ronivon.costa.googlepages.com/">http://ronivon.costa.googlepages.com/</A> -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon at hotmail.com</A> ------------------------------------------------------------------------------ _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> -------------- next part -------------- An HTML attachment was scrubbed... URL: <A HREF="http://www.opencores.org/forums.cgi/cores/attachments/20080514/dfd6cd38/attachment.htm">http://www.opencores.org/forums.cgi/cores/attachments/20080514/dfd6cd38/attachment.htm</A> While we are on the subject I had assumed that only the project originator could update the repository. I see this isn't the case as Andreas has modified some of the T80 files. Is there any reason why I could not merge in the fpgaarcade.com one into the opencores repository? /Mike ----- Original Message ----- From: Ronivon Costa To: Discussion list about free open source IP cores Sent: Wednesday, May 14, 2008 9:57 AM Subject: Re: [oc] Re: T80 Core x The T80 is working just good. What I meant is, htat using the Mike's release did not change the behaviour of my project. I managed to identify ad fix the problem, which was related to mixing latches with rising edge flip flops. (at seems this is what I think). I moved all Z80 bus inputs/outputs outside processes. I have already updated opencores with the new files. It is working great. Thanks 2008/5/14 H. Peter Anvin hpa at zytor.com>: ronivon.costa at gmail.com wrote: Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. For what it's worth, I have a successful project using T80 at: http://www.abc80.org/~hpa/fpga/ I had to make a few changes to the T80 core to make it work. -hpa _______________________________________________ http://www.opencores.org/mailman/listinfo/cores -- -- Visit my personal page: http://ronivon.costa.googlepages.com/ -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: ronivon at hotmail.com ------------------------------------------------------------------------------ _______________________________________________ http://www.opencores.org/mailman/listinfo/cores -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080514/dfd6cd38/attachment.htm

Re: T80 Core x by Unknown on May 15, 2008			Not available!
Hi Mike, Sorry if I will say something too obvious, but... If you want to update the T80 core cvs tree under Opencores, you will have to ask the T80 core owner to add you as a maintainer. Only after that, you will have access rights on opencores.org to submit your changes. Kind regards, Roni. 2008/5/14 MikeJ <<A HREF="http://www.opencores.org/mailman/listinfo/cores">mikej at freeuk.com</A>>: [q] While we are on the subject I had assumed that only the project originator could update the repository. I see this isn't the case as Andreas has modified some of the T80 files. Is there any reason why I could not merge in the fpgaarcade.com one into the opencores repository? /Mike ----- Original Message ----- From: Ronivon Costa <<A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon.costa at gmail.com</A>> To: Discussion list about free open source IP cores<<A HREF="http://www.opencores.org/mailman/listinfo/cores">cores at opencores.org</A>> Sent: Wednesday, May 14, 2008 9:57 AM Subject: Re: [oc] Re: T80 Core x The T80 is working just good. What I meant is, htat using the Mike's release did not change the behaviour of my project. I managed to identify ad fix the problem, which was related to mixing latches with rising edge flip flops. (at seems this is what I think). I moved all Z80 bus inputs/outputs outside processes. I have already updated opencores with the new files. It is working great. Thanks 2008/5/14 H. Peter Anvin <<A HREF="http://www.opencores.org/mailman/listinfo/cores">hpa at zytor.com</A>>: [q] <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon.costa at gmail.com</A> wrote: [q] Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. [/q] For what it's worth, I have a successful project using T80 at: <A HREF="http://www.abc80.org/~hpa/fpga/<http://www.abc80.org/%7Ehpa/fpga/">http://www.abc80.org/~hpa/fpga/<http://www.abc80.org/%7Ehpa/fpga/</A>> I had to make a few changes to the T80 core to make it work. -hpa _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> [/q] -- -- Visit my personal page: <A HREF="http://ronivon.costa.googlepages.com/">http://ronivon.costa.googlepages.com/</A> -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon at hotmail.com</A> ------------------------------ _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> [/q] -- -- Visit my personal page: <A HREF="http://ronivon.costa.googlepages.com/">http://ronivon.costa.googlepages.com/</A> -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: <A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon at hotmail.com</A> -------------- next part -------------- An HTML attachment was scrubbed... URL: <A HREF="http://www.opencores.org/forums.cgi/cores/attachments/20080515/717947db/attachment-0001.htm">http://www.opencores.org/forums.cgi/cores/attachments/20080515/717947db/attachment-0001.htm</A> Hi Mike, Sorry if I will say something too obvious, but... If you want to update the T80 core cvs tree under Opencores, you will have to ask the T80 core owner to add you as a maintainer. Only after that, you will have access rights on opencores.org to submit your changes. Kind regards, Roni. 2008/5/14 MikeJ mikej at freeuk.com>: While we are on the subject I had assumed that only the project originator could update the repository. I see this isn't the case as Andreas has modified some of the T80 files. Is there any reason why I could not merge in the fpgaarcade.com one into the opencores repository? /Mike ----- Original Message ----- From: Ronivon Costa ronivon.costa at gmail.com> To: Discussion list about free open source IP corescores at opencores.org> Sent: Wednesday, May 14, 2008 9:57 AM Subject: Re: [oc] Re: T80 Core x The T80 is working just good. What I meant is, htat using the Mike's release did not change the behaviour of my project. I managed to identify ad fix the problem, which was related to mixing latches with rising edge flip flops. (at seems this is what I think). I moved all Z80 bus inputs/outputs outside processes. I have already updated opencores with the new files. It is working great. Thanks 2008/5/14 H. Peter Anvin hpa at zytor.com>: ronivon.costa at gmail.com wrote: Hi Mike, I downloaded the the T80 from fpgaarcade. I had to use T80se instead of T80s (which is missing). Also, I tried T80_RegX instead of T80_Reg. The changes did not do any good. A sequence of commands "ld (hl),register" works just fine. If I put that in a loop, it fails (see first post, I posted a sample program there). It works fine for DE1. So, thinking again, it can't be a bug in the T80. For what it's worth, I have a successful project using T80 at: http://www.abc80.org/~hpa/fpga/> I had to make a few changes to the T80 core to make it work. -hpa _______________________________________________ http://www.opencores.org/mailman/listinfo/cores -- -- Visit my personal page: http://ronivon.costa.googlepages.com/ -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: ronivon at hotmail.com ------------------------------ _______________________________________________ http://www.opencores.org/mailman/listinfo/cores _______________________________________________ http://www.opencores.org/mailman/listinfo/cores -- -- Visit my personal page: http://ronivon.costa.googlepages.com/ -- Ronivon C. Costa IBM TIVOLI Certified Consultant & Instructor VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal) Skype: ronivon.costa / Messenger: ronivon at hotmail.com -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080515/717947db/attachment-0001.htm

Re: T80 Core x by webmaster on May 16, 2008			webmaster Posts: 4 Joined: Sep 12, 2011 Last seen: Oct 29, 2026
Hi Mike and Ronivon, Here's the procedure to get added as a maintainer. If the original maintainer/s doesnÂ’t update/fix project or response on email, then send us an email (<A HREF="http://www.opencores.org/mailman/listinfo/cores">webmaster at opencores.org</A>) and we will make a final try to reach them. If we donÂ’t get a response, then we will add you as an additional maintainer. ItÂ’s very important that all cores continues to be supported and upgraded when/if people find bug or make improvements. Regards, The OC-team ----- Original Message ----- From: Ronivon Costa<<A HREF="http://www.opencores.org/mailman/listinfo/cores">ronivon.costa at g...</A>> To: Date: Thu May 15 16:16:54 CEST 2008 Subject: [oc] Re: T80 Core x [q] Hi Mike, Sorry if I will say something too obvious, but... If you want to update the T80 core cvs tree under Opencores, you will have to ask the T80 core owner to add you as a maintainer. Only after that, you will have access rights on opencores.org to submit your changes. Kind regards, Roni. 2008/5/14 MikeJ <attachment-0001.htm [/q] Hi Mike and Ronivon, Here's the procedure to get added as a maintainer. If the original maintainer/s doesnÂ’t update/fix project or response on email, then send us an email (webmaster at opencores.org) and we will make a final try to reach them. If we donÂ’t get a response, then we will add you as an additional maintainer. ItÂ’s very important that all cores continues to be supported and upgraded when/if people find bug or make improvements. Regards, The OC-team ----- Original Message ----- From: Ronivon Costaronivon.costa at g...> To: Date: Thu May 15 16:16:54 CEST 2008 Subject: [oc] Re: T80 Core x Hi Mike, Sorry if I will say something too obvious, but... If you want to update the T80 core cvs tree under Opencores, you will have to ask the T80 core owner to add you as a maintainer. Only after that, you will have access rights on opencores.org to submit your changes. Kind regards, Roni. 2008/5/14 MikeJ

Re: T80 Core x by Unknown on Dec 25, 2008			Not available!
<A HREF="http://www.opencores.org/mailman/listinfo/cores">webmaster at opencores.org</A> wrote: [q] Hi Mike and Ronivon, Here's the procedure to get added as a maintainer. If the original maintainer/s doesnâ€™t update/fix project or response on email, then send us an email (<A HREF="http://www.opencores.org/mailman/listinfo/cores">webmaster at opencores.org</A>) and we will make a final try to reach them. If we donâ€™t get a response, then we will add you as an additional maintainer. Itâ€™s very important that all cores continues to be supported and upgraded when/if people find bug or make improvements.[/q] Hello, Did anything ever happen with this? I'm kind of curious... it looks to me as if the Auto_Wait stuff is completely broken in the fpgaarcade version of the core, and I'm interested in trying to merge my changes with the ones in that version -- if at all meaningful. (I happen to have a new FPGA board for Christmas, hence the temporary interest...) -hpa webmaster at opencores.org wrote: Hi Mike and Ronivon, Here's the procedure to get added as a maintainer. If the original maintainer/s doesnâ€™t update/fix project or response on email, then send us an email (webmaster at opencores.org) and we will make a final try to reach them. If we donâ€™t get a response, then we will add you as an additional maintainer. Itâ€™s very important that all cores continues to be supported and upgraded when/if people find bug or make improvements. Hello, Did anything ever happen with this? I'm kind of curious... it looks to me as if the Auto_Wait stuff is completely broken in the fpgaarcade version of the core, and I'm interested in trying to merge my changes with the ones in that version -- if at all meaningful. (I happen to have a new FPGA board for Christmas, hence the temporary interest...) -hpa

Re: T80 Core x by Unknown on Dec 25, 2008			Not available!
MikeJ wrote: [q] Hi Peter, I have not been idle on this - for a change :) I have been working with Alessandro who has written a complete set of instructions for the Z80. I have dug out my old board which has a real z80 on and I have fixed a few operation timings. I am waiting for an additional to the test case which will allow me to test the undocumented instructions as well - after this I will check back into opencores. I did not receive too much detail from you on the auto-wait problem. Tell you what, why don't I send you the current snapshot and you can have a play, tell me whats broken and I'll fix it and check in the whole lot.?? I think the other fixes you made to the opencores varient have already been fixed in the FPGA version, so I think it is worth you starting from that point. Let me know, /Mike [/q] Well... I tried to apply the Auto_Wait fix I had, but the v301 code has a comment about "ripped out Auto_Wait stuff that caused problems." As far as I can tell, and the synthesizer seems to agree, the Auto_Wait stuff in v301 was simply lobotomized (although I have to admit to not having looked at the waveform.) The one-liner I had made Auto_Wait work with IM 2, which was the sticking point for me. The other two changes were the repeating I/O instruction fix, which is in your code base, and the RETI_n output signal, which is not (the reason is to avoid the need to snoop the bus for the RETI opcode, which is easy on a true tristate bus but is messy inside a programmable logic chip.) -hpa MikeJ wrote: Hi Peter, I have not been idle on this - for a change :) I have been working with Alessandro who has written a complete set of instructions for the Z80. I have dug out my old board which has a real z80 on and I have fixed a few operation timings. I am waiting for an additional to the test case which will allow me to test the undocumented instructions as well - after this I will check back into opencores. I did not receive too much detail from you on the auto-wait problem. Tell you what, why don't I send you the current snapshot and you can have a play, tell me whats broken and I'll fix it and check in the whole lot.?? I think the other fixes you made to the opencores varient have already been fixed in the FPGA version, so I think it is worth you starting from that point. Let me know, /Mike Well... I tried to apply the Auto_Wait fix I had, but the v301 code has a comment about "ripped out Auto_Wait stuff that caused problems." As far as I can tell, and the synthesizer seems to agree, the Auto_Wait stuff in v301 was simply lobotomized (although I have to admit to not having looked at the waveform.) The one-liner I had made Auto_Wait work with IM 2, which was the sticking point for me. The other two changes were the repeating I/O instruction fix, which is in your code base, and the RETI_n output signal, which is not (the reason is to avoid the need to snoop the bus for the RETI opcode, which is easy on a true tristate bus but is messy inside a programmable logic chip.) -hpa

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