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Libraries
by Unknown on Feb 4, 2004 |
Not available! | ||
Hello,
I am implementing a news processor architecture with Verilog HDL. I want to know what are the available libraries (for Verilog HDL) I can use to speedup my design. I was thinking that there should be some libraries for ALU, memory and so on. More, does any one have some hints about Load and store units in Verilog HDL? Thank you for your advices Ben UEC, IS |
Libraries
by Unknown on Feb 4, 2004 |
Not available! | ||
On Wed, 2004-02-04 at 14:35, Ben A. Abderazek wrote:
Hello,
Ben,
I am frequently use these two, FIFOs and MEMORIES
(single and dual ported SRAMs):
http://www.opencores.org/cgi-bin/cvsget.cgi/generic_fifos
http://www.opencores.org/cgi-bin/cvsget.cgi/generic_memories
Regards,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
..............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/
I am implementing a news processor architecture with Verilog HDL. I want to know what are the available libraries (for Verilog HDL) I can use to speedup my design. I was thinking that there should be some libraries for ALU, memory and so on. More, does any one have some hints about Load and store units in Verilog HDL? Thank you for your advices Ben UEC, IS |
Libraries
by Unknown on Feb 4, 2004 |
Not available! | ||
Guys & Gals,
wee need a clear identification of what libraries are
available and where they are. I believe Generic Memories
are hidden in CVS and there is no projects page for them.
I would like to propose to add a "Libraries" category
under "Projects"
Regards,
rudi
========================================================
ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
..............::: FPGAs * Full Custom ICs * IP Cores :::
FREE IP Cores -> http://www.asics.ws/
|
Libraries
by Unknown on Feb 4, 2004 |
Not available! | ||
Thank you so much Rudi,
You really helped me so much by sending the Links. It was no so easy for
me to find them on the CVS.
Regard,
/Ben
----- Original Message -----
From: "Rudolf Usselmann" rudi at asics.ws>
To: "Ben A. Abderazek" ben at is.uec.ac.jp>; "Discussion list about free
open source IP cores" cores at opencores.org>
Sent: Wednesday, February 04, 2004 5:25 PM
Subject: Re: [oc] Libraries
> On Wed, 2004-02-04 at 14:35, Ben A. Abderazek wrote:
> > Hello,
> > I am implementing a news processor architecture with Verilog HDL.
> > I want to know what are the available libraries (for Verilog HDL) I
can use
> > to speedup my design.
> > I was thinking that there should be some libraries for ALU, memory and
so
> > on.
> > More, does any one have some hints about Load and store units in
Verilog
> > HDL?
> > Thank you for your advices
> >
> > Ben
> > UEC, IS
>
>
> Ben,
>
> I am frequently use these two, FIFOs and MEMORIES
> (single and dual ported SRAMs):
>
> http://www.opencores.org/cgi-bin/cvsget.cgi/generic_fifos
> http://www.opencores.org/cgi-bin/cvsget.cgi/generic_memories
>
>
> Regards,
> rudi
> ========================================================
> ASICS.ws ::: Solutions for your ASIC/FPGA needs :::
> ..............::: FPGAs * Full Custom ICs * IP Cores :::
> FREE IP Cores -> http://www.asics.ws/
>
>
|
Libraries
by Unknown on Feb 4, 2004 |
Not available! | ||
available and where they are. I believe Generic Memories
They are not hidden in the CVS. They are there.
http://www.opencores.org/cvsweb.shtml/ and go down to generic_memories.
are hidden in CVS and there is no projects page for them.
I would like to propose to add a "Libraries" category
under "Projects" Libraries section sounds good. regards, Damjan |
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