I am looking for the smallest CPU that can be implemented in an FPGA
for use in various projects that don't have a lot of room to spare.
Typically the speed does not need to be high, just not something that
requires dozens of cycles to execute a single instruction.

I found the tiny8 CPU here and if I am reading the description
correctly, it is about 350 LUT4s which makes it one of the smaller
CPUs around. I have also found the gr0040 which is supported by an
interesting document that compares several of the smaller CPUs. But
this design is not licensed for any commercial use.

Anyone work with the tiny8 CPU design? I would be interested in
knowing your results. What did you use to develop your code?

Rick

Also you could find similar project in SAYEH, please let me know if you interest to this processor. regards ARH On Thu, Jul 31, 2008 at 8:33 AM, gnuarm.2007 at arus.com> wrote: -- Best regards, Alireza Haghdoost -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080801/22019aca/attachment.html

You may want to take a look on what I did. I took a 8051, converted it from VHDL to verilog and added memories to allow easy usage with xilinx fpga. http://bknpk.no-ip.biz/usb_1.html ----- Original Message ----- From: gnuarm.2007 at arus.comgnuarm.2007 at a...> To: Date: Thu Jul 31 17:33:01 CEST 2008 Subject: [oc] Tiny CPUs in programmable logic

Actually, I couldn't find any real info on it other than the sources. From the look of it, I don't think it would be especially small, but unless I implement it and check, I can't tell how many LUTs it uses. Unfortunately, I don't have time to synthesize every processor at oc.org to see how large they are. Rick ----- Original Message ----- From: Alireza Haghdoosthaghdoost at g...> To: Date: Fri Aug 1 08:08:43 CEST 2008 Subject: [oc] Tiny CPUs in programmable logic

Thanks, I have looked at this 8051 design before. At 4500 LUTs, it is not nearly as small as the other designs I have been discussing. In fact, this is one of the largest designs for an 8 bit processor. Rick ----- Original Message ----- From: bknpk at hotmail.combknpk at h...> To: Date: Fri Aug 1 19:55:25 CEST 2008 Subject: [oc] Tiny CPUs in programmable logic

On : http://www.springerlink.com/content/n04367547741167g/ There is a book on a (this?) SAYEH processor. -----Original Message----- From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org]On Behalf Of Rick Collins Sent: Fri, August 01, 2008 9:39 PM To: cores at opencores.org Subject: Re: [oc] Tiny CPUs in programmable logic Actually, I couldn't find any real info on it other than the sources. From the look of it, I don't think it would be especially small, but unless I implement it and check, I can't tell how many LUTs it uses. Unfortunately, I don't have time to synthesize every processor at oc.org to see how large they are. Rick ----- Original Message ----- From: Alireza Haghdoosthaghdoost at g...> To: Date: Fri Aug 1 08:08:43 CEST 2008 Subject: [oc] Tiny CPUs in programmable logic _______________________________________________ http://www.opencores.org/mailman/listinfo/cores No virus found in this incoming message. Checked by AVG - http://www.avg.com Version: 8.0.138 / Virus Database: 270.5.10/1586 - Release Date: 8/1/2008 6:59 PM

I'm not sure how this forum is intended to work. I see that all of the messages in this thread are treated as if they were in separate threads. Anyone know why this is happening? Also, the software doesn't seem to be able to connect threads across date boundaries of the month and when in Thread view mode, clicking the "Next" link moves to another month, but in Date view mode. Is this the way the software is supposed to work? Rick ----- Original Message ----- From: Rick Collinsgnuarm.2006 at a...> To: Date: Fri Aug 1 21:40:54 CEST 2008 Subject: [oc] Tiny CPUs in programmable logic

I assume you already had a look at the Xilinx PicoBlaze? It's free of
charge for use on Xilinx FPGAs and about the smallest design I came
across yet - just a few hundred LUT, depending on the I/O you
connect. Will fit in a XC3S50. Its drawback is the non-existent
external data/address bus - and of course the limitation to Xilinx
FPGAs.
I believe Altera has a similar design for use on their FPGAs.

Joern

On 1-Aug-08, at 12:40 PM, Rick Collins wrote:

At 04:05 PM 8/2/2008, you wrote:
Yes, I am also having this conversation in a thread in the [fpga-cpu] group where I had said about CPUs with full documentation and software support, "There are six that come close. Xilinx, Altera and Lattice all provide two CPUs for their chips. One is a bit too large, but is supported with compilers. The other is small, but no compiler. They are all well documented." The Xilinx and Altera parts are only licensed for use in their chips. I don't really want to use a CPU that is not portable. The Lattice 32 bit part is open source in theory, but still, the larger parts are too large for this app. I have their smaller part on my radar. I don't recall if it is licensed to use in other vendor's parts. I also have on my radar the other versions of the CPUs from Xilinx and Altera (Pacoblaze for example). It just seemed to me that I can't be the only designer who wants a minimal CPU implementation and does not want to be locked to one vendor's hardware. When I saw the nearly hundred processors at OC, I figured at least one or two of them would be fully developed with tools and docs and be small enough to include in a smaller part. So far nothing has jumped out as fitting the bill. But there are plenty to continue looking at. Rick Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080803/207058a1/attachment.html

On Sunday 03 August 2008 14:15:09 Rick Collins wrote:
It all depends on what you mean by "minimal" CPU. How many LUTs are you budgeting for your processor? 500/1000/2000? cheers. -- with metta, Shawn Tan Aeste Works (M) Sdn Bhd - Engineering Elegance http://www.aeste.net

At 12:32 PM 8/3/2008, you wrote:
This message list doesn't work very well. When I view and reply to posts online they are not connected in a thread. Replying by email seems to connect the posts into a thread. Very odd... I am looking for something 500 LUTs and smaller. There are a small number of CPUs that fit this description. The ZPU is the one that sounds like it would be the best fit, but there is actually little documentation on it. Jan Gray has some CPU designs from around 2002 that are very small, but he used tbufs for the large muxes and they are no longer supported in FPGAs. Also, he has not licensed it for commercial apps. I will have more time for this in a couple of weeks. I may write a survey paper for all of the devices I can find. Rick Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080804/b9f0efdc/attachment-0001.htm

On Monday 04 August 2008 17:41:26 Rick Collins wrote:
You may want to focus your search on the 8-bit processors. If you want an open C compiler, you may wish to consider SDCC. So, that will help limit your search. It is unlikely that you will find many 32-bit processors under 500LUTs. The register file alone can consume more than 500LUTs. Good luck! -- with metta, Shawn Tan Aeste Works (M) Sdn Bhd - Engineering Elegance http://www.aeste.net