Dear list, I wonder whether anybody would be able to assist me with this: I am fairly new to Verilog, and am trying to use the i2c slave driver within a verilog program to run on an fpga. However, I don't understand exactly how to call / activate the module. Also whereabouts in the code would I add in my own code so that when a register is requested it reads the value from RAM (separate controller)? Any advice / tips would be greatly appreciated, Many thanks, Julian Granger-Bevan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080731/e2696d60/attachment.htm

What i2c slave core (driver???) are you using? The one provided with the i2c_master_core is NOT synthesizable. It is for simulations only. Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 31 July 2008 17:45 To: cores at opencores.org Subject: [oc] Using Verilog I2C core Dear list, I wonder whether anybody would be able to assist me with this: I am fairly new to Verilog, and am trying to use the i2c slave driver within a verilog program to run on an fpga. However, I don't understand exactly how to call / activate the module. Also whereabouts in the code would I add in my own code so that when a register is requested it reads the value from RAM (separate controller)? Any advice / tips would be greatly appreciated, Many thanks, Julian Granger-Bevan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080801/616fe101/attachment-0001.htm

If a VHDL design can help, take a look on how I used in free (LEON) VHDL CPU: http://bknpk.no-ip.biz/I2C/leon_2.html ----- Original Message ----- From: Julian Granger-Bevanjg456 at c...> To: Date: Thu Jul 31 17:45:18 CEST 2008 Subject: [oc] Using Verilog I2C core

That will be my (one of my) mistake(s) then. I also tried with a slave core from fpga4fun (and I'm fairly sure that is a full slave driver) - with issues, will try on their forums for some support - unless anyone on here would be willing to do so? Thanks a lot Richard (and also bknpk - although I think that is only a master too), Julian _____ From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Richard Herveille Sent: 01 August 2008 09:15 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core What i2c slave core (driver???) are you using? The one provided with the i2c_master_core is NOT synthesizable. It is for simulations only. Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 31 July 2008 17:45 To: cores at opencores.org Subject: [oc] Using Verilog I2C core Dear list, I wonder whether anybody would be able to assist me with this: I am fairly new to Verilog, and am trying to use the i2c slave driver within a verilog program to run on an fpga. However, I don't understand exactly how to call / activate the module. Also whereabouts in the code would I add in my own code so that when a register is requested it reads the value from RAM (separate controller)? Any advice / tips would be greatly appreciated, Many thanks, Julian Granger-Bevan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080801/fbfde88f/attachment.htm

Ehm . I do have a full functioning slave; but that's only available commercially (i.e. for sale). Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 01 August 2008 21:40 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core That will be my (one of my) mistake(s) then. I also tried with a slave core from fpga4fun (and I'm fairly sure that is a full slave driver) - with issues, will try on their forums for some support - unless anyone on here would be willing to do so? Thanks a lot Richard (and also bknpk - although I think that is only a master too), Julian _____ From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Richard Herveille Sent: 01 August 2008 09:15 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core What i2c slave core (driver???) are you using? The one provided with the i2c_master_core is NOT synthesizable. It is for simulations only. Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 31 July 2008 17:45 To: cores at opencores.org Subject: [oc] Using Verilog I2C core Dear list, I wonder whether anybody would be able to assist me with this: I am fairly new to Verilog, and am trying to use the i2c slave driver within a verilog program to run on an fpga. However, I don't understand exactly how to call / activate the module. Also whereabouts in the code would I add in my own code so that when a register is requested it reads the value from RAM (separate controller)? Any advice / tips would be greatly appreciated, Many thanks, Julian Granger-Bevan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080802/325a6f56/attachment.html

Any chance of a link to the place you got it from? Thanks, Julian _____ From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Richard Herveille Sent: 02 August 2008 11:19 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core Ehm . I do have a full functioning slave; but that's only available commercially (i.e. for sale). Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 01 August 2008 21:40 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core That will be my (one of my) mistake(s) then. I also tried with a slave core from fpga4fun (and I'm fairly sure that is a full slave driver) - with issues, will try on their forums for some support - unless anyone on here would be willing to do so? Thanks a lot Richard (and also bknpk - although I think that is only a master too), Julian _____ From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Richard Herveille Sent: 01 August 2008 09:15 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core What i2c slave core (driver???) are you using? The one provided with the i2c_master_core is NOT synthesizable. It is for simulations only. Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 31 July 2008 17:45 To: cores at opencores.org Subject: [oc] Using Verilog I2C core Dear list, I wonder whether anybody would be able to assist me with this: I am fairly new to Verilog, and am trying to use the i2c slave driver within a verilog program to run on an fpga. However, I don't understand exactly how to call / activate the module. Also whereabouts in the code would I add in my own code so that when a register is requested it reads the value from RAM (separate controller)? Any advice / tips would be greatly appreciated, Many thanks, Julian Granger-Bevan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080803/2e14a3fa/attachment-0001.htm

I wrote it; it's mine, but it's only available as a commercial core. Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 03 August 2008 21:44 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core Any chance of a link to the place you got it from? Thanks, Julian _____ From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Richard Herveille Sent: 02 August 2008 11:19 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core Ehm . I do have a full functioning slave; but that's only available commercially (i.e. for sale). Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 01 August 2008 21:40 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core That will be my (one of my) mistake(s) then. I also tried with a slave core from fpga4fun (and I'm fairly sure that is a full slave driver) - with issues, will try on their forums for some support - unless anyone on here would be willing to do so? Thanks a lot Richard (and also bknpk - although I think that is only a master too), Julian _____ From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Richard Herveille Sent: 01 August 2008 09:15 To: 'Discussion list about free open source IP cores' Subject: RE: [oc] Using Verilog I2C core What i2c slave core (driver???) are you using? The one provided with the i2c_master_core is NOT synthesizable. It is for simulations only. Richard From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Julian Granger-Bevan Sent: 31 July 2008 17:45 To: cores at opencores.org Subject: [oc] Using Verilog I2C core Dear list, I wonder whether anybody would be able to assist me with this: I am fairly new to Verilog, and am trying to use the i2c slave driver within a verilog program to run on an fpga. However, I don't understand exactly how to call / activate the module. Also whereabouts in the code would I add in my own code so that when a register is requested it reads the value from RAM (separate controller)? Any advice / tips would be greatly appreciated, Many thanks, Julian Granger-Bevan -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080804/9ca702ae/attachment-0001.html