Hi everyone,

My name is Kevin Phillipson. I am the project leader of the Gator
uProcessor project on opencores. It is a Motorola/Freescale HC11
compatible processor designed at the University of Florida for
teaching purposes. Currently we have a team of students using the
processor and lab kits for evaluation and we need a some form of
mailing list to order to effectively communicate information to the
whole group. So my question is... is there a way to create a sublist
specifically for just this project. I was thinking it would be useful
to use opencores to do this so other people could benefit from this
information. On the other hand I dont want to clog up the main mailing
list either. So if anyone can shed some more light on this I would
appreciate it. Anyway thanks for all the help and information you guys
provide!

Kevin Phillipson

Kevin, Why not create a group in yahoo groups? You can restrict it to members only and screen your applicants. I don't know what opencores uses for servers and IT support but it is probably is no where near what yahoo has for free. John Eaton ----- Original Message ----- From: Kevin Phillipsonkevin.phillipson at g...> To: Date: Thu Sep 11 16:39:51 CEST 2008 Subject: [oc] Gator uProcessor (HC11 compatible) Mailing list

Thanks for the response... I actually went ahead and made a google group. For those that are interested heres the address: http://groups.google.com/group/gator-uprocessor Kevin On Mon, Sep 15, 2008 at 12:21 PM, z3qmtr45 at iinet.com> wrote:

On Thu, 2008-09-11 at 10:39 -0400, Kevin Phillipson wrote:

Hi Kevin, If the project is open source, then using OpenCores seems a good thing - the more open processors the better. Your students will benefit from external input. I suggest starting with the main OpenCores list - that's what other processors like ZPU and JOP use, and will garner the widest outside visibility. If your project garners a following, then a specialist list can be set up (as for example with OpenRISC). A specialist list is a mixed blessing - only specialists tend to subscribe, so you lose the wider input. There are 13 specialist mailing lists on OpenCores, but I think only 3 have had any postings this year. It would be good to host the source at OpenCores (so external users have easy access). The FAQ explains how to do this. http://www.opencores.org/faq.cgi/section/6/6.5#6.5 HTH, Jeremy -- Tel: +44 (1202) 416955 Cell: +44 (7970) 676050 SkypeID: jeremybennett Email: jeremy.bennett at embecosm.com Web: www.embecosm.com

At 03:49 AM 9/16/2008, you wrote:


Normally, I would agree with this. But the processor list at OC is
***so*** long and so many of the projects are either poorly
documented or not even really begun, that it is a real hindrance to
finding the cores that may be interesting. I know because I did a
search earlier this year and found that some 30% or so were not even
to the point of simulating code.

If I get a chance later this year, I plan to produce an index of
these processors which I hope can be hosted at OC to help people
review the available cores.


Certainly the main list is not currently overwhelmed. But if this core is being used to teach a class, it may generate a lot more traffic than may be desirable on this list. Rick -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080916/894f2ed4/attachment.html

Hi Jeremy and Rick, Thanks for the input. Considering that current students that are using the processor will be using it for an undergraduate microprocessor applications class, most of the questions will be specifics of completeing their lab assignments and what not. Therefore I dont think that it's good material to be posting on the main mailing list. It would be helpful from the point of view of using the processor core in general but it might be too many simple debugging issues that are unrelated to the actual internal architecture of the GuP. Thats why I wanted to have a separate list. Anyway I think the google groups will work well for our purposes. Jeremy, you suggested posting the source code on opencores. It's already been posted: http://www.opencores.org/projects.cgi/web/gup/overview It's not the most up to date version but you can find that at the official website: http://www.mil.ufl.edu/gup/ And for anyone that want to view the google group heres another link: http://groups.google.com/group/gator-uprocessor All these websites are pretty new right now... but expect them to grow quickly. As for the processor core itself... it is actually very stable and well tested. It implements all of the HC11 instruction set (source and binary compatible) and it is being expanded to support many HC12 instructions (source compatible) as well as its own unique instructions. It is not designed to be cycle compatible with either and instead efforts were made to have faster cycle-by-cycle timing. Some compromises in speed were made in the GuP 2.0 version though to implement a multiplexed external bus for teaching purposes. The internal architecture is quite unique to other FPGA cpu cores in that it uses the internal memory blocks of the FPGA to store its microcode. The microcode source and assembler is also included with the design. Again this was mainly done for teaching purposes. The download package also contains GIO ports, UART, Timer, ADC controller, VGA & PS/2 interface. The package is deliveried as an Altera Quartus project... but could be ported to any other device very easily. Anyway, thanks for the interest guys and I hope some of you can find some use out of it! Kevin 2008/9/16 Rick Collins gnuarm.2006 at arius.com>: On Tue, Sep 16, 2008 at 3:49 AM, Jeremy Bennett jeremy.bennett at embecosm.com> wrote:

--- On Tue, 9/16/08, Rick Collins gnuarm.2006 at arius.com> wrote:
What would be nice is better organization (hierarchy) for the designs, and perhaps 'peer' review of where they are located. IE put the right things in the right places. I looked through all the CPU ones as well, some really good designs are from the emulation (old systems never die they just become a program running them instead) enthusiasts. However bottom line some careful structure would help. Links for code related (IE VHDL Verilog etc) related tutorials etc. that are peer rated (IE people rate the tools by maturity and functionality). Ditto would be good for designs.

Perhaps []
Stephen

Hi All, The OC-team are currently testing a new version of the OpenCores-site, with improved download statistics, improved forum-functions (easy to add new topics etc), better organization of IP cores and any other improvements. We hope to launch this shortly......... Best regards, The OC-team ----- Original Message ----- From: z3qmtr45 at iinet.comz3qmtr45 at i...> To: Date: Mon Sep 15 18:21:16 CEST 2008 Subject: [oc] Gator uProcessor (HC11 compatible) Mailing list

Hi Kevin I made a port of the HC11's SPI core. It's only the master for now, but the slave can be easily added. You might want to take a look at it. The code is on OpenCores. Richard -----Original Message----- From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of Kevin Phillipson Sent: 16 September 2008 15:48 To: Discussion list about free open source IP cores Subject: Re: [oc] Gator uProcessor (HC11 compatible) Mailing list Hi Jeremy and Rick, Thanks for the input. Considering that current students that are using the processor will be using it for an undergraduate microprocessor applications class, most of the questions will be specifics of completeing their lab assignments and what not. Therefore I dont think that it's good material to be posting on the main mailing list. It would be helpful from the point of view of using the processor core in general but it might be too many simple debugging issues that are unrelated to the actual internal architecture of the GuP. Thats why I wanted to have a separate list. Anyway I think the google groups will work well for our purposes. Jeremy, you suggested posting the source code on opencores. It's already been posted: http://www.opencores.org/projects.cgi/web/gup/overview It's not the most up to date version but you can find that at the official website: http://www.mil.ufl.edu/gup/ And for anyone that want to view the google group heres another link: http://groups.google.com/group/gator-uprocessor All these websites are pretty new right now... but expect them to grow quickly. As for the processor core itself... it is actually very stable and well tested. It implements all of the HC11 instruction set (source and binary compatible) and it is being expanded to support many HC12 instructions (source compatible) as well as its own unique instructions. It is not designed to be cycle compatible with either and instead efforts were made to have faster cycle-by-cycle timing. Some compromises in speed were made in the GuP 2.0 version though to implement a multiplexed external bus for teaching purposes. The internal architecture is quite unique to other FPGA cpu cores in that it uses the internal memory blocks of the FPGA to store its microcode. The microcode source and assembler is also included with the design. Again this was mainly done for teaching purposes. The download package also contains GIO ports, UART, Timer, ADC controller, VGA & PS/2 interface. The package is deliveried as an Altera Quartus project... but could be ported to any other device very easily. Anyway, thanks for the interest guys and I hope some of you can find some use out of it! Kevin 2008/9/16 Rick Collins gnuarm.2006 at arius.com>: On Tue, Sep 16, 2008 at 3:49 AM, Jeremy Bennett jeremy.bennett at embecosm.com> wrote:




***so***

that

be
_______________________________________________ http://www.opencores.org/mailman/listinfo/cores

Can you guys please create a wiki on digital design? Quoting oc-team at opencores.org:

------------------------------------------------------

The projects page marks all projects that are wishbone compatible. If
you see a
"WBC" then you know exactly what to expect in terms of ports and
protocols for
the interface.

There is also a listing to mark which projects are "DONE" but there
doesn't seem to be any standard that defines what DONE means. From
what I can see "DONE" simply means that the design owner has finished
working on the design.

Perhaps we should create a rating system that gives a better
indication of the state and quality for each design. It is not likely
to fit into a simple done/not_done.

I like the idea of a better organization. You don't let book authors
shelf their own books in the library. We need a group of librarians
who can keep the shelves in good order.

Opencores has grown to the point where we need to improve the quality
of the design base. This should be the first place a designer goes to
if they need a new module and we can make that happen if the modules
are complete and verified.


John Eaton

At 11:25 AM 9/17/2008, you wrote:



That's good, but very incomplete. There are any number of technical
aspects of a CPU design that could be noted. I think a table with a
number of evaluation criteria would be important. This should
include non-technical things like documentation, availability of a
test bench, assembler, C compiler and other tools. Technical aspects
would include resource usage in 4 input LUTs/Block RAMs, target
hardware it has been tested on and synthesis tools it has been
evaluated under.

The projects page could use a lot more information or perhaps a
special page for CPUs is appropriate at this point. I also think it
would be *very* helpful if each project page were to use a similar
format and to have a guide for the content. Right now they are all
random assortments of different information. There is some basic
info that should be on every CPU project page and we could make a
"style" guide that includes all of that.




"DONE" varies *hugely*. We need to break that into specific aspects
and each one evaluated separately.




That's a very good analogy. I think for this sort of effort, the
appropriate title would be editor. We need to have a few editors to
manage the content of the main pages and to set guidelines for the
format of the project specific pages.


And documented well! BTW, I would be happy to volunteer to be an editor. Rick Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20080918/a167bde7/attachment.html