Does anyone knows a language used to describe hardware in the transaction level? --- Acabe com aquelas janelinhas que pulam na sua tela. AntiPop-up UOL - É grátis! http://antipopup.uol.com.br

Aloha! Quoting Fernando Remus Nagel frnagel at uol.com.br>: I've seen and been using both different languages and tools. SystemC for example is used for this type of modelling. Also Cadence have (had?) a tool called VCC, which basically is a tool for modelleling embedded systems on a transaction level. We used it to model a wireless modem ASIC a few years ago. But, most of the time, I see people using tools that allows them to model HW in objects and sending messages (i.e. transactions) between these objects. Java, C++ and even Perl have been known to be used for this. Since it's the transactions you are interested in, you rarely are interested in detailed timing and RTL-level details. More importantly are causality preserving behaviuour etc. Also, at transaction level you normally model big patterns (packet processing, protocols, komplex bus behaviours etc) this means that the speed of simulation is quite important. This means that good abstract modelling and good performance for handling complex structures are what you want. Based on this, it Compiled C++ might not seem like a weird choice. Good luck. -- Med vänlig hälsning, Yours Joachim Strömbergson - Alltid i harmonisk svängning. VP, Research & Development ---------------------------------------------------------------------- InformAsic AB / Hugo Grauers gata 5B / SE-411 33 GÖTEBORG / Sweden Tel: +46 31 68 54 90 Fax: +46 31 68 54 91 Mobile: +46 733 75 97 02 E-mail: joachim.strombergson at informasic.com Home: www.informasic.com ----------------------------------------------------------------------