Hi, I am new to opencores, pci bridge and verilog. I would like to synthesize and implement pci-bridge-only application and run tests on Inside board with Spartan2 (xc2s150-pq208-5 chip). I am not sure how to setup the project and what tools to use. Is webpack 6 (current free version) suitable for this task? Is *.ucf file for bridge-only design available? Any information would be greatly appreciated! Regards, Richard -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20040205/c5cb19c6/attachment.htm