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Plasma/Xilinx problem by Unknown on Feb 11, 2009			Not available!
Hello, Has somebody tried building the Plasma Core as shipped in the latest Xilinx ISE 10.3 environment? I own a Microblaze Starter Kit (a bigger brother to the 3E-Starter Kit used in the example) which hosts a Spartan-3E 1600E Device instead of the 500E located on the more common 3E-Starter Kit. The pin out is identical of both of these as far as I know. I'm trying to build a working Plasma-SOC using the standard I've done the following: - Created a new project using Spartan-3E 1600E - Included the necessary files (f.e. ram_xilinx for the BRAM instanse) - Did some changes in the VHDL code (mentioned in comments) to make it work with Xilinx primitives/ISE - Changed the SD<A4> address line pin config in the UCF for the DDR which seemed to be off for me. F4=>E4 Still it is hassling me about the following problem, why is that? It don't understand the problem.. -snip- ERROR Pack:1107 - Unable to combine the following symbols into a single IOB component: BUF symbol "E_TX_EN_OBUF" (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" (Pad Signal = E_TX_EN) An IO component of type IOB was chosen because the IO contains symbols and/or properties consistent with output or bi-directional usage and contains no other symbols or properties that require a more specific IO component type. Each of the following constraints specifies an illegal physical site for a component of type IOB: Symbol "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF]) The component type is determined by the types of logic and the properties and configuration of the logic it contains. Please double check that the types of logic elements and all of their relevant properties and configuration options are compatible with the physical site type of the constraint. Please correct the constraints accordingly. -snip- Anybody care to comment? It sure would be nice to see the Plasma boot on my card. Thanks in advance! Best Regards Magnus Hello, Has somebody tried building the Plasma Core as shipped in the latest Xilinx ISE 10.3 environment? I own a Microblaze Starter Kit (a bigger brother to the 3E-Starter Kit used in the example) which hosts a Spartan-3E 1600E Device instead of the 500E located on the more common 3E-Starter Kit. The pin out is identical of both of these as far as I know. I'm trying to build a working Plasma-SOC using the standard I've done the following: - Created a new project using Spartan-3E 1600E - Included the necessary files (f.e. ram_xilinx for the BRAM instanse) - Did some changes in the VHDL code (mentioned in comments) to make it work with Xilinx primitives/ISE - Changed the SD address line pin config in the UCF for the DDR which seemed to be off for me. F4=>E4 Still it is hassling me about the following problem, why is that? It don't understand the problem.. -snip- ERROR Pack:1107 - Unable to combine the following symbols into a single IOB component: BUF symbol "E_TX_EN_OBUF" (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" (Pad Signal = E_TX_EN) An IO component of type IOB was chosen because the IO contains symbols and/or properties consistent with output or bi-directional usage and contains no other symbols or properties that require a more specific IO component type. Each of the following constraints specifies an illegal physical site for a component of type IOB: Symbol "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF]) The component type is determined by the types of logic and the properties and configuration of the logic it contains. Please double check that the types of logic elements and all of their relevant properties and configuration options are compatible with the physical site type of the constraint. Please correct the constraints accordingly. -snip- Anybody care to comment? It sure would be nice to see the Plasma boot on my card. Thanks in advance! Best Regards Magnus

Plasma/Xilinx problem by Unknown on Feb 13, 2009			Not available!
I'm not very familiar with Xilinx, but it sounds as if you're trying to place an output or bidirectional signal at a pin which is input-only. There are usually a few pins that have different functions for different FPGA family members in the same package. The solution would be to place that signal at a different IO than P15, if possible. Brgds Gunnar Dahlgren <A HREF="http://www.opencores.org/mailman/listinfo/cores">magnus.wedmark at gmail.com</A> wrote: [q] Hello, Has somebody tried building the Plasma Core as shipped in the latest Xilinx ISE 10.3 environment? I own a Microblaze Starter Kit (a bigger brother to the 3E-Starter Kit used in the example) which hosts a Spartan-3E 1600E Device instead of the 500E located on the more common 3E-Starter Kit. The pin out is identical of both of these as far as I know. I'm trying to build a working Plasma-SOC using the standard I've done the following: - Created a new project using Spartan-3E 1600E - Included the necessary files (f.e. ram_xilinx for the BRAM instanse) - Did some changes in the VHDL code (mentioned in comments) to make it work with Xilinx primitives/ISE - Changed the SD<A4> address line pin config in the UCF for the DDR which seemed to be off for me. F4=>E4 Still it is hassling me about the following problem, why is that? It don't understand the problem.. -snip- ERROR Pack:1107 - Unable to combine the following symbols into a single IOB component: BUF symbol "E_TX_EN_OBUF" (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" (Pad Signal = E_TX_EN) An IO component of type IOB was chosen because the IO contains symbols and/or properties consistent with output or bi-directional usage and contains no other symbols or properties that require a more specific IO component type. Each of the following constraints specifies an illegal physical site for a component of type IOB: Symbol "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF]) The component type is determined by the types of logic and the properties and configuration of the logic it contains. Please double check that the types of logic elements and all of their relevant properties and configuration options are compatible with the physical site type of the constraint. Please correct the constraints accordingly. -snip- Anybody care to comment? It sure would be nice to see the Plasma boot on my card. Thanks in advance! Best Regards Magnus _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A>[/q] I'm not very familiar with Xilinx, but it sounds as if you're trying to place an output or bidirectional signal at a pin which is input-only. There are usually a few pins that have different functions for different FPGA family members in the same package. The solution would be to place that signal at a different IO than P15, if possible. Brgds Gunnar Dahlgren magnus.wedmark at gmail.com wrote: Hello, Has somebody tried building the Plasma Core as shipped in the latest Xilinx ISE 10.3 environment? I own a Microblaze Starter Kit (a bigger brother to the 3E-Starter Kit used in the example) which hosts a Spartan-3E 1600E Device instead of the 500E located on the more common 3E-Starter Kit. The pin out is identical of both of these as far as I know. I'm trying to build a working Plasma-SOC using the standard I've done the following: - Created a new project using Spartan-3E 1600E - Included the necessary files (f.e. ram_xilinx for the BRAM instanse) - Did some changes in the VHDL code (mentioned in comments) to make it work with Xilinx primitives/ISE - Changed the SD address line pin config in the UCF for the DDR which seemed to be off for me. F4=>E4 Still it is hassling me about the following problem, why is that? It don't understand the problem.. -snip- ERROR Pack:1107 - Unable to combine the following symbols into a single IOB component: BUF symbol "E_TX_EN_OBUF" (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" (Pad Signal = E_TX_EN) An IO component of type IOB was chosen because the IO contains symbols and/or properties consistent with output or bi-directional usage and contains no other symbols or properties that require a more specific IO component type. Each of the following constraints specifies an illegal physical site for a component of type IOB: Symbol "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF]) The component type is determined by the types of logic and the properties and configuration of the logic it contains. Please double check that the types of logic elements and all of their relevant properties and configuration options are compatible with the physical site type of the constraint. Please correct the constraints accordingly. -snip- Anybody care to comment? It sure would be nice to see the Plasma boot on my card. Thanks in advance! Best Regards Magnus _______________________________________________ http://www.opencores.org/mailman/listinfo/cores

Plasma/Xilinx problem by rhoads on Feb 16, 2009			rhoads Posts: 16 Joined: Sep 25, 2001 Last seen: Jan 11, 2023
Magnus, Regarding your problem with running the Plasma CPU on the Microblaze Starter Kit with the Spartan-3E 1600E FPGA: [q] ERROR Pack:1107 - Unable to combine the following symbols into a single IOB component: BUF symbol "E_TX_EN_OBUF" (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" (Pad Signal = E_TX_EN) physical site for a component of type IOB: Symbol "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF])[/q] I found the Microblaze Starter Kit documentation at: <A HREF="http://www.xilinx.com/support/documentation/">http://www.xilinx.com/support/documentation/</A> spartan-3e_board_and_kit_documentation.htm Which led me to: <A HREF="http://www.xilinx.com/support/documentation/boards_and_kits/">http://www.xilinx.com/support/documentation/boards_and_kits/</A> ug257.pdf Looking at the schematic on page 145 it looks like the E_TX_EN (Ethernet Transmit Enable) signal is on pin P16 instead of P15. It looks like IR14 is on pin P15. The documentation appears inconsistant since the rest of the documentation refers to E_TX_EN being on pin P15. Thanks, Steve Rhoads (Plasma CPU developer) Magnus, Regarding your problem with running the Plasma CPU on the Microblaze Starter Kit with the Spartan-3E 1600E FPGA: ERROR Pack:1107 - Unable to combine the following symbols into a single IOB component: BUF symbol "E_TX_EN_OBUF" (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" (Pad Signal = E_TX_EN) physical site for a component of type IOB: Symbol "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF]) I found the Microblaze Starter Kit documentation at: http://www.xilinx.com/support/documentation/ spartan-3e_board_and_kit_documentation.htm Which led me to: http://www.xilinx.com/support/documentation/boards_and_kits/ ug257.pdf Looking at the schematic on page 145 it looks like the E_TX_EN (Ethernet Transmit Enable) signal is on pin P16 instead of P15. It looks like IR14 is on pin P15. The documentation appears inconsistant since the rest of the documentation refers to E_TX_EN being on pin P15. Thanks, Steve Rhoads (Plasma CPU developer)

Plasma/Xilinx problem by Unknown on Feb 17, 2009			Not available!
Thanks to both of you, Gunnar och Steve! You are both correct, the P15 pin is one of the pins that are different between 500E and the 1600E device in the 320-pin package. I thought they were 100% pin-compatible.. Just as you said Steve I was mislead by the typos in the Microblaze Starter Kit Manual papers (P16=>P15) but after looking either at the Schematics and the white papers of the Spartan-3E yesterday night I got it correct. The first simple example of the Plasma, 'test.c' booted yesterday on the 1600E! I managed to build the Plasma SOC with ISE 10.3 and to use the precompiled Windows cross-compilation suite to build the test.c I want to test both the DDR and the Ethernet functionality on my card in the near future! I noticed that the VGA-signals are being connected at the top level, are there any demos of it being used? Simple text display, graphics? Anyone tried booting it/loading programs from a SD-Card? That would be most useful. A bootloader (located in BRAM) that preloads a firmware or lists the files for the user to choose.. The simplest way would probably be to use for example EFSL through SPI and connect some of the I/O directly. Thank you Steve for sharing some excellent work you've done with Plasma! Best Regards Magnus ----- Original Message ----- From: rhoads at opencores.org<<A HREF="http://www.opencores.org/mailman/listinfo/cores">rhoads at o...</A>> To: Date: Mon Feb 16 01:06:45 CET 2009 Subject: [oc] Plasma/Xilinx problem [q] Magnus, Regarding your problem with running the Plasma CPU on the Microblaze Starter Kit with the Spartan-3E 1600E FPGA: [q]> ERROR Pack:1107 - Unable to combine the following symbols into [/q] a [q]> single IOB component: BUF symbol "E_TX_EN_OBUF" > (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" > (Pad Signal = E_TX_EN) > physical site for a component of type IOB: Symbol > "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF]) [/q] I found the Microblaze Starter Kit documentation at: <A HREF="http://www.xilinx.com/support/documentation/">http://www.xilinx.com/support/documentation/</A> spartan-3e_board_and_kit_documentation.htm Which led me to: <A HREF="http://www.xilinx.com/support/documentation/boards_and_kits/">http://www.xilinx.com/support/documentation/boards_and_kits/</A> ug257.pdf Looking at the schematic on page 145 it looks like the E_TX_EN (Ethernet Transmit Enable) signal is on pin P16 instead of P15. It looks like IR14 is on pin P15. The documentation appears inconsistant since the rest of the documentation refers to E_TX_EN being on pin P15. Thanks, Steve Rhoads (Plasma CPU developer) [/q] Thanks to both of you, Gunnar och Steve! You are both correct, the P15 pin is one of the pins that are different between 500E and the 1600E device in the 320-pin package. I thought they were 100% pin-compatible.. Just as you said Steve I was mislead by the typos in the Microblaze Starter Kit Manual papers (P16=>P15) but after looking either at the Schematics and the white papers of the Spartan-3E yesterday night I got it correct. The first simple example of the Plasma, 'test.c' booted yesterday on the 1600E! I managed to build the Plasma SOC with ISE 10.3 and to use the precompiled Windows cross-compilation suite to build the test.c I want to test both the DDR and the Ethernet functionality on my card in the near future! I noticed that the VGA-signals are being connected at the top level, are there any demos of it being used? Simple text display, graphics? Anyone tried booting it/loading programs from a SD-Card? That would be most useful. A bootloader (located in BRAM) that preloads a firmware or lists the files for the user to choose.. The simplest way would probably be to use for example EFSL through SPI and connect some of the I/O directly. Thank you Steve for sharing some excellent work you've done with Plasma! Best Regards Magnus ----- Original Message ----- From: rhoads at opencores.orgrhoads at o...> To: Date: Mon Feb 16 01:06:45 CET 2009 Subject: [oc] Plasma/Xilinx problem Magnus, Regarding your problem with running the Plasma CPU on the Microblaze Starter Kit with the Spartan-3E 1600E FPGA: > ERROR Pack:1107 - Unable to combine the following symbols into a > single IOB component: BUF symbol "E_TX_EN_OBUF" > (Output Signal = E_TX_EN) PAD symbol "E_TX_EN" > (Pad Signal = E_TX_EN) > physical site for a component of type IOB: Symbol > "E_TX_EN" (LOC=P15 [Physical Site Type = IBUF]) I found the Microblaze Starter Kit documentation at: http://www.xilinx.com/support/documentation/ spartan-3e_board_and_kit_documentation.htm Which led me to: http://www.xilinx.com/support/documentation/boards_and_kits/ ug257.pdf Looking at the schematic on page 145 it looks like the E_TX_EN (Ethernet Transmit Enable) signal is on pin P16 instead of P15. It looks like IR14 is on pin P15. The documentation appears inconsistant since the rest of the documentation refers to E_TX_EN being on pin P15. Thanks, Steve Rhoads (Plasma CPU developer)

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