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Searching I2S core by Unknown on Dec 3, 2003			Not available!
Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÂ²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range. At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at <A HREF="http://www.opencores.org/">http://www.opencores.org/</A> for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi -- Johann Glaser <<A HREF="http://www.opencores.org/mailman/listinfo/cores">Johann.Glaser at gmx.at</A>> Vienna University of Technology Electrical Engineering ____ <A HREF="http://www.johann-glaser.at/">http://www.johann-glaser.at/</A> ____ Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÂ²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range. At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at http://www.opencores.org/ for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi -- Johann Glaser Johann.Glaser at gmx.at> Vienna University of Technology Electrical Engineering ____ http://www.johann-glaser.at/ ____

Searching I2S core by Unknown on Dec 4, 2003			Not available!
On Thu, 2003-12-04 at 04:09, Johann Glaser wrote: [q] Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÂ²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range.[/q] I'm not quite sure what cind of Audio Codecs you are talking about, but if you are planning to use something similar to what PC Audio cards use, look at the AC97 controller IP core, it provides an interface to AC97 compatible audio codecs (up to 6 channels, input, output). [q] At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at <A HREF="http://www.opencores.org/">http://www.opencores.org/</A> for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi[/q] Regards, rudi ======================================================== ASICS.ws ::: Solutions for your ASIC/FPGA needs ::: ..............::: FPGAs * Full Custom ICs * IP Cores ::: FREE IP Cores -> <A HREF="http://www.asics.ws/">http://www.asics.ws/</A> <- FREE EDA Tools On Thu, 2003-12-04 at 04:09, Johann Glaser wrote: Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÂ²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range. I'm not quite sure what cind of Audio Codecs you are talking about, but if you are planning to use something similar to what PC Audio cards use, look at the AC97 controller IP core, it provides an interface to AC97 compatible audio codecs (up to 6 channels, input, output). At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at http://www.opencores.org/ for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi Regards, rudi ======================================================== ASICS.ws ::: Solutions for your ASIC/FPGA needs ::: ..............::: FPGAs * Full Custom ICs * IP Cores ::: FREE IP Cores -> http://www.asics.ws/

Searching I2S core by Unknown on Dec 4, 2003			Not available!
At 09:21 2003-12-04 +0700, Rudolf Usselmann wrote: [q]On Thu, 2003-12-04 at 04:09, Johann Glaser wrote: [q] Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÃ‚Â²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range.[/q] I'm not quite sure what cind of Audio Codecs you are talking about, but if you are planning to use something similar to what PC Audio cards use, look at the AC97 controller IP core, it provides an interface to AC97 compatible audio codecs (up to 6 channels, input, output).[/q] Or stick to your I2S codec and build the interface yourself, it's quite trivial. In case you haven't found it yourself already, the spec can be found here: <A HREF="http://www.semiconductors.philips.com/acrobat/various/I2SBUS.pdf">http://www.semiconductors.philips.com/acrobat/various/I2SBUS.pdf</A> (it actually includes schematics for receiver & transmitter) Regards Gunnar [q] [q] At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at <A HREF="http://www.opencores.org/">http://www.opencores.org/</A> for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi[/q] Regards, rudi ======================================================== ASICS.ws ::: Solutions for your ASIC/FPGA needs ::: ..............::: FPGAs * Full Custom ICs * IP Cores ::: FREE IP Cores -> <A HREF="http://www.asics.ws/">http://www.asics.ws/</A> <- FREE EDA Tools _______________________________________________ <A HREF="http://www.opencores.org/mailman/listinfo/cores">http://www.opencores.org/mailman/listinfo/cores</A> [/q] At 09:21 2003-12-04 +0700, Rudolf Usselmann wrote: On Thu, 2003-12-04 at 04:09, Johann Glaser wrote: Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÃ‚Â²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range. I'm not quite sure what cind of Audio Codecs you are talking about, but if you are planning to use something similar to what PC Audio cards use, look at the AC97 controller IP core, it provides an interface to AC97 compatible audio codecs (up to 6 channels, input, output). Or stick to your I2S codec and build the interface yourself, it's quite trivial. In case you haven't found it yourself already, the spec can be found here: http://www.semiconductors.philips.com/acrobat/various/I2SBUS.pdf (it actually includes schematics for receiver & transmitter) Regards Gunnar At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at http://www.opencores.org/ for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi Regards, rudi ======================================================== ASICS.ws ::: Solutions for your ASIC/FPGA needs ::: ..............::: FPGAs * Full Custom ICs * IP Cores ::: FREE IP Cores -> http://www.asics.ws/ http://www.opencores.org/mailman/listinfo/cores

Searching I2S core by Unknown on Dec 6, 2003			Not available!
Hello Hansi. I was in your shoes a few months ago when I needed exactly the same to interface to the TLV320AIC23B audio CODEC from Texas instruments. I have completed my project and have successfully used the I2S interfaces that I designed. However, I have implemented the I2S receiver and transmitter as separate entities, because in my design they needed to be so. Since I just finished the project a couple of days ago, there isn't a whole lot of documentation others that all my comments in the code. I will be more than happy to provide the VHDL code to you. I designed them with FIFO interfaces, so they don't really need to be memory mapped, you only read from or write to the FIFOs Let me know if you are interested. Regards, Marco Marco Castellon <<A HREF="http://www.opencores.org/mailman/listinfo/cores">castell at ece.ualberta.ca</A>> University of Alberta, Edmonton CANADA ----- Original Message ----- From: Johann Glaser <<A HREF="http://www.opencores.org/mailman/listinfo/cores">Johann.Glaser at g...</A> > To: <A HREF="http://www.opencores.org/mailman/listinfo/cores">cores at o...</A> Date: Wed, 03 Dec 2003 22:09:48 +0100 Subject: [oc] Searching I2S core [q] Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÂ²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range. At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at <A HREF="http://www.opencores.org/">http://www.opencores.org/</A> for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi -- Johann Glaser <<A HREF="http://www.opencores.org/mailman/listinfo/cores">Johann.Glaser at g...</A> > Vienna University of Technology Electrical Engineering ____ <A HREF="http://www.johann-glaser.at/">http://www.johann-glaser.at/</A> ____ [/q] Hello Hansi. I was in your shoes a few months ago when I needed exactly the same to interface to the TLV320AIC23B audio CODEC from Texas instruments. I have completed my project and have successfully used the I2S interfaces that I designed. However, I have implemented the I2S receiver and transmitter as separate entities, because in my design they needed to be so. Since I just finished the project a couple of days ago, there isn't a whole lot of documentation others that all my comments in the code. I will be more than happy to provide the VHDL code to you. I designed them with FIFO interfaces, so they don't really need to be memory mapped, you only read from or write to the FIFOs Let me know if you are interested. Regards, Marco Marco Castellon castell at ece.ualberta.ca> University of Alberta, Edmonton CANADA ----- Original Message ----- From: Johann Glaser Johann.Glaser at g... > To: cores at o... Date: Wed, 03 Dec 2003 22:09:48 +0100 Subject: [oc] Searching I2S core Hi! On an add-on PCB I plan to build for my Infineon TriBoard I want to have an audio codec. All such codecs I found until now want the digital input data via the so call IÂ²S or I2S interface. Since my TriCore TC1775 doesn't have an I2S output, I searched for a chip which has. It should be accessable via the bus at a certain address range. At sci.electronics.design I was told that no such chip exists and I have to do the job in an CPLD or FPGA. Therefore I searched at http://www.opencores.org/ for a core for that. Unfortunately I didn't find one. Does anybody of you have (started to write) an I2S core? If not I'll write it myself and release it at OpenCores.org. Nevertheless I'd be happy if you can point me to a (not necessarily complete) implementation. Thanks in advance Hansi -- Johann Glaser Johann.Glaser at g... > Vienna University of Technology Electrical Engineering ____ http://www.johann-glaser.at/ ____

Searching I2S core by Unknown on Dec 7, 2003			Not available!
Hello Marco! [q] I was in your shoes a few months ago when I needed exactly the same to interface to the TLV320AIC23B audio CODEC from Texas instruments. I have completed my project and have successfully used the I2S interfaces that I designed. However, I have implemented the I2S receiver and transmitter as separate entities, because in my design they needed to be so. Since I just finished the project a couple of days ago, there isn't a whole lot of documentation others that all my comments in the code. I will be more than happy to provide the VHDL code to you. I designed them with FIFO interfaces, so they don't really need to be memory mapped, you only read from or write to the FIFOs[/q] That sounds really interessting! Do you plan to put the sources to OpenCores.org? Could you please send me your files that I can have a look at it? Thanks a lot in advance! Bye Hansi -- Johann Glaser <<A HREF="http://www.opencores.org/mailman/listinfo/cores">Johann.Glaser at gmx.at</A>> Vienna University of Technology Electrical Engineering ____ <A HREF="http://www.johann-glaser.at/">http://www.johann-glaser.at/</A> ____ Hello Marco! I was in your shoes a few months ago when I needed exactly the same to interface to the TLV320AIC23B audio CODEC from Texas instruments. I have completed my project and have successfully used the I2S interfaces that I designed. However, I have implemented the I2S receiver and transmitter as separate entities, because in my design they needed to be so. Since I just finished the project a couple of days ago, there isn't a whole lot of documentation others that all my comments in the code. I will be more than happy to provide the VHDL code to you. I designed them with FIFO interfaces, so they don't really need to be memory mapped, you only read from or write to the FIFOs That sounds really interessting! Do you plan to put the sources to OpenCores.org? Could you please send me your files that I can have a look at it? Thanks a lot in advance! Bye Hansi -- Johann Glaser Johann.Glaser at gmx.at> Vienna University of Technology Electrical Engineering ____ http://www.johann-glaser.at/ ____

Searching I2S core by Unknown on Jan 22, 2005			Not available!
Hello Marco It seems that I've sent this message to the wrong person at first. Sorry about that. I would like to ask you if you managed to obtain some more detailed information about TLV320AIC23B Codec. I need to know what is the BCLK frequency in Master Mode. Data sheet is rather poor and it doesn't explain clearly how to use this device. Data sheet suggest that the maximum frequency is 50Mhz but it has nothing to do with 12MHz crystal. Thank you in advance for help Peter ----- Original Message ----- From: <A HREF="http://www.opencores.org/mailman/listinfo/cores">castell at e...</A><<A HREF="http://www.opencores.org/mailman/listinfo/cores">castell at e...</A>> To: Date: Sat Dec 6 23:27:18 CET 2003 Subject: [oc] Searching I2S core [q] Hello Hansi. I was in your shoes a few months ago when I needed exactly the [/q] same [q] to interface to the TLV320AIC23B audio CODEC from Texas instruments. I have completed my project and have successfully used the I2S interfaces that I designed. However, I have implemented the I2S receiver and transmitter as separate entities, because in my design they needed to be so. Since I just finished the project a couple of days ago, there isn't a whole lot of documentation others that all my comments in the code. I will be more than happy to provide the VHDL code to you. I designed them with FIFO interfaces, so they don't really need to be memory mapped, you only read from or write to the FIFOs Let me know if you are interested. Regards, Marco Marco Castellon <<A HREF="http://www.opencores.org/mailman/listinfo/cores">castell at e...</A>> University of Alberta, Edmonton CANADA [/q] Hello Marco It seems that I've sent this message to the wrong person at first. Sorry about that. I would like to ask you if you managed to obtain some more detailed information about TLV320AIC23B Codec. I need to know what is the BCLK frequency in Master Mode. Data sheet is rather poor and it doesn't explain clearly how to use this device. Data sheet suggest that the maximum frequency is 50Mhz but it has nothing to do with 12MHz crystal. Thank you in advance for help Peter ----- Original Message ----- From: castell at e...castell at e...> To: Date: Sat Dec 6 23:27:18 CET 2003 Subject: [oc] Searching I2S core Hello Hansi. I was in your shoes a few months ago when I needed exactly the same to interface to the TLV320AIC23B audio CODEC from Texas instruments. I have completed my project and have successfully used the I2S interfaces that I designed. However, I have implemented the I2S receiver and transmitter as separate entities, because in my design they needed to be so. Since I just finished the project a couple of days ago, there isn't a whole lot of documentation others that all my comments in the code. I will be more than happy to provide the VHDL code to you. I designed them with FIFO interfaces, so they don't really need to be memory mapped, you only read from or write to the FIFOs Let me know if you are interested. Regards, Marco Marco Castellon castell at e...> University of Alberta, Edmonton CANADA

Searching I2S core by Unknown on Sep 28, 2006			Not available!
Hello Macro, Here is my work: I receive SPDIF and convert to I2s , then i convert serial data of I2s to parallel. Do you have any idea ? ----- Original Message ----- From: <A HREF="http://www.opencores.org/mailman/listinfo/cores">piotrek_trela at y...</A><<A HREF="http://www.opencores.org/mailman/listinfo/cores">piotrek_trela at y...</A>> To: Date: Sat Jan 22 13:30:07 CET 2005 Subject: [oc] Searching I2S core [q] Hello Marco It seems that I've sent this message to the wrong person at first. Sorry about that. I would like to ask you if you managed to obtain some more detailed information about TLV320AIC23B Codec. I need to know what is the BCLK frequency in Master Mode. Data sheet is rather poor and it doesn't explain clearly how to use this device. Data sheet suggest that the maximum frequency is 50Mhz but it has nothing to do with 12MHz crystal. Thank you in advance for help Peter ----- Original Message ----- From: <A HREF="http://www.opencores.org/mailman/listinfo/cores">castell at e...</A><<A HREF="http://www.opencores.org/mailman/listinfo/cores">castell at e...</A>> To: Date: Sat Dec 6 23:27:18 CET 2003 Subject: [oc] Searching I2S core [q]> Hello Hansi. > > I was in your shoes a few months ago when I needed exactly the [/q] same [q]> to interface to the TLV320AIC23B audio CODEC from Texas > instruments. > I have completed my project and have successfully used the I2S > interfaces that I designed. > However, I have implemented the I2S receiver and transmitter [/q] as [q]> separate entities, because in my design they needed to be so. [/q] Since [q]> I > just finished the project a couple of days ago, there isn't a [/q] whole [q]> lot of > documentation others that all my comments in the code. > I will be more than happy to provide the VHDL code to you. > I designed them with FIFO interfaces, so they don't really [/q] need to [q]> be > memory mapped, you only read from or write to the FIFOs > Let me know if you are interested. > Regards, > Marco > Marco Castellon <<A HREF="http://www.opencores.org/mailman/listinfo/cores">castell at e...</A>> > University of Alberta, Edmonton CANADA [/q] [/q] Hello Macro, Here is my work: I receive SPDIF and convert to I2s , then i convert serial data of I2s to parallel. Do you have any idea ? ----- Original Message ----- From: piotrek_trela at y...piotrek_trela at y...> To: Date: Sat Jan 22 13:30:07 CET 2005 Subject: [oc] Searching I2S core Hello Marco It seems that I've sent this message to the wrong person at first. Sorry about that. I would like to ask you if you managed to obtain some more detailed information about TLV320AIC23B Codec. I need to know what is the BCLK frequency in Master Mode. Data sheet is rather poor and it doesn't explain clearly how to use this device. Data sheet suggest that the maximum frequency is 50Mhz but it has nothing to do with 12MHz crystal. Thank you in advance for help Peter ----- Original Message ----- From: castell at e...castell at e...> To: Date: Sat Dec 6 23:27:18 CET 2003 Subject: [oc] Searching I2S core > Hello Hansi. > > I was in your shoes a few months ago when I needed exactly the same > to interface to the TLV320AIC23B audio CODEC from Texas > instruments. > I have completed my project and have successfully used the I2S > interfaces that I designed. > However, I have implemented the I2S receiver and transmitter as > separate entities, because in my design they needed to be so. Since > I > just finished the project a couple of days ago, there isn't a whole > lot of > documentation others that all my comments in the code. > I will be more than happy to provide the VHDL code to you. > I designed them with FIFO interfaces, so they don't really need to > be > memory mapped, you only read from or write to the FIFOs > Let me know if you are interested. > Regards, > Marco > Marco Castellon castell at e...> > University of Alberta, Edmonton CANADA

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