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DCT Project [ROM64 and others]
by Unknown on Mar 2, 2004 |
Not available! | ||
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I,m sorry,I can,t find the library of video_compress_systems.could u
please give me a link to that page?
----- Original Message -----
From: Richard Herveille richard at a...>
To: cores at o...
Date: Sun, 13 Apr 2003 09:00:51 +0100
Subject: Re: [oc] DCT Project [ROM64 and others]
For some more learning, there's another DCT project (8x8 2D DCT). It's in the video_compression_systems library. Richard
> Hello !
>
> I have been trying to compile Cosine transform (DCT) [@
> http://www.opencores.org/projects/dct/ ] with Max+plusII, i
have found an
> error on Database Builder from ROM64.vhd...
> > ... the error says: > Error: Node':199886.IN2' missing source > (there are 768 errors like this one) > > Probably it is my fault because i have not initialize ROM like i should or
> something like that... but i can't find what the problem is.
> > I also would like to know... > > 1) What is ain(0) declared on div2_9_en.vhd, because it is never used.
> (Code below)
> > 2)On add12slow: > > > output_temp unsigned(b(11)&b);
>
> Why concatenate a(11)&a and b(11)&b ? It is that on the standard ?
>
> ----( Code > )-------------------------------------------------------------------
> LIBRARY ieee ;
> USE ieee.std_logic_1164.all; > USE ieee.std_logic_arith.all; > > ENTITY add12slow IS > PORT( > a : IN std_logic_vector (11 downto 0) ; > b : IN std_logic_vector (11 downto 0) ; > output : OUT std_logic_vector (12 downto 0) > ); > > -- Declarations > > END add12slow ; |
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DCT Project [ROM64 and others]
by Unknown on Mar 2, 2004 |
Not available! | ||
|
Use CVS or CVSweb to get a tarball from the directory. Richard
-----Original Message-----
From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On
Behalf Of zzy_00 at 163.com
Sent: Tuesday, March 02, 2004 3:47 AM
To: cores at opencores.org
Subject: Re: [oc] DCT Project [ROM64 and others]
I,m sorry,I can,t find the library of video_compress_systems.could u
please give me a link to that page?
----- Original Message -----
From: Richard Herveille richard at a...>
To: cores at o...
Date: Sun, 13 Apr 2003 09:00:51 +0100
Subject: Re: [oc] DCT Project [ROM64 and others]
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
>
> > > For some more learning, there's another DCT project (8x8 2D DCT). > It's in the video_compression_systems library. > > Richard > >
> Hello !
>
> I have been trying to compile Cosine transform (DCT) [@
> http://www.opencores.org/projects/dct/ ] with Max+plusII, i
> have found an
> error on Database Builder from ROM64.vhd...
> > ... the error says: > Error: Node':199886.IN2' missing source > (there are 768 errors like this one) > > Probably it is my fault because i have not initialize ROM > like i should or
> something like that... but i can't find what the problem is.
> > I also would like to know... > > 1) What is ain(0) declared on div2_9_en.vhd, because it is > never used.
> (Code below)
> > 2)On add12slow: > > > output_temp > unsigned(b(11)&b);
>
> Why concatenate a(11)&a and b(11)&b ? It is that > on the standard ?
>
> ----( Code > > )-------------------------------------------------------------------
> LIBRARY ieee ;
> USE ieee.std_logic_1164.all; > USE ieee.std_logic_arith.all; > > ENTITY add12slow IS > PORT( > a : IN std_logic_vector (11 downto 0) ; > b : IN std_logic_vector (11 downto 0) ; > output : OUT std_logic_vector (12 downto 0) > ); > > -- Declarations > > END add12slow ; > |
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